[coreboot-gerrit] New patch to review for coreboot: soc/intel/quark: Add the verstage files
Lee Leahy (leroy.p.leahy@intel.com)
gerrit at coreboot.org
Thu Jan 5 00:47:16 CET 2017
Lee Leahy (leroy.p.leahy at intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/18040
-gerrit
commit 930846dd2a07b77535713f02aa722487cbde4dc5
Author: Lee Leahy <leroy.p.leahy at intel.com>
Date: Wed Jan 4 08:26:53 2017 -0800
soc/intel/quark: Add the verstage files
Add the files to support verstage for vboot.
TEST=Build and run on Galileo Gen2
Change-Id: Icf87075012c08cf581c17d579e0763888c707265
Signed-off-by: Lee Leahy <leroy.p.leahy at intel.com>
---
src/soc/intel/quark/Makefile.inc | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/src/soc/intel/quark/Makefile.inc b/src/soc/intel/quark/Makefile.inc
index bd297ed..1d66e6b 100644
--- a/src/soc/intel/quark/Makefile.inc
+++ b/src/soc/intel/quark/Makefile.inc
@@ -25,6 +25,11 @@ bootblock-y += reg_access.c
bootblock-y += tsc_freq.c
bootblock-y += uart_common.c
+verstage-y += i2c.c
+verstage-y += reg_access.c
+verstage-y += tsc_freq.c
+verstage-$(CONFIG_ENABLE_BUILTIN_HSUART1) += uart_common.c
+
romstage-y += i2c.c
romstage-y += memmap.c
romstage-y += reg_access.c
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