[coreboot-gerrit] New patch to review for coreboot: [TEST ME]mb/lenovo/t400: Implement hybrid graphic in romstage

[Arthur Heymans (arthur@aheymans.xyz)]

Arthur Heymans (arthur at aheymans.xyz) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/18010

-gerrit

commit 95d08f809dca395395a71bc3b52440cf254ed0bd
Author: Arthur Heymans <arthur at aheymans.xyz>
Date:   Mon Jan 2 16:16:45 2017 +0100

    [TEST ME]mb/lenovo/t400: Implement hybrid graphic in romstage
    
    The hybrid driver in src/drivers/lenovo/hybrid.c does not work for
    t400.
    
    Change-Id: I7496876e9b434d4a2388e1ede27ac604670339b7
    Signed-off-by: Arthur Heymans <arthur at aheymans.xyz>
---
 src/mainboard/lenovo/t400/Kconfig     |  1 -
 src/mainboard/lenovo/t400/cmos.layout |  1 +
 src/mainboard/lenovo/t400/romstage.c  | 68 +++++++++++++++++++++++++++++++++--
 3 files changed, 67 insertions(+), 3 deletions(-)

diff --git a/src/mainboard/lenovo/t400/Kconfig b/src/mainboard/lenovo/t400/Kconfig
index 47e7688..f0839c7 100644
--- a/src/mainboard/lenovo/t400/Kconfig
+++ b/src/mainboard/lenovo/t400/Kconfig
@@ -22,7 +22,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
 	select MAINBOARD_HAS_NATIVE_VGA_INIT_TEXTMODECFG
 	select INTEL_INT15
 	select SUPERIO_NSC_PC87382
-	select DRIVERS_LENOVO_HYBRID_GRAPHICS
 
 config MAINBOARD_DIR
 	string
diff --git a/src/mainboard/lenovo/t400/cmos.layout b/src/mainboard/lenovo/t400/cmos.layout
index 61212dd..8583027 100644
--- a/src/mainboard/lenovo/t400/cmos.layout
+++ b/src/mainboard/lenovo/t400/cmos.layout
@@ -142,6 +142,7 @@ enumerations
 11    12     352M
 12    0     Integrated Only
 12    1     Discrete Only
+12    2	    switchable
 
 # -----------------------------------------------------------------
 checksums
diff --git a/src/mainboard/lenovo/t400/romstage.c b/src/mainboard/lenovo/t400/romstage.c
index d110d4f..bf43f3c 100644
--- a/src/mainboard/lenovo/t400/romstage.c
+++ b/src/mainboard/lenovo/t400/romstage.c
@@ -36,6 +36,32 @@
 #define LPC_DEV PCI_DEV(0, 0x1f, 0)
 #define MCH_DEV PCI_DEV(0, 0, 0)
 
+#define HYBRID_GRAPHICS_INTEGRATED_ONLY 0
+#define HYBRID_GRAPHICS_DISCRETE_ONLY 1
+#define HYBRID_GRAPHICS_SWITCHABLE 2
+
+#define MUX_GPIO 22
+#define BCL_CTL_GPIO 19
+#define GFX_PWM_GPIO 49
+
+#define HYBRID_DETECT_GPIO 21
+
+static void configure_mux_gpio(u8 level)
+{
+	set_gpio(MUX_GPIO, level);
+	set_gpio(BCL_CTL_GPIO, level);
+	set_gpio(GFX_PWM_GPIO, level);
+}
+
+static bool hybrid_graphics_installed(void)
+{
+	if (get_gpio(21))
+		return false;
+	else
+		return true;
+}
+
+
 static void early_lpc_setup(void)
 {
 	/* Set up SuperIO LPC forwards */
@@ -78,6 +104,46 @@ void mainboard_romstage_entry(unsigned long bist)
 
 	setup_pch_gpios(&t400_gpio_map);
 
+	/* Set up hybrid graphics */
+	uint8_t hybrid_graphics_mode = HYBRID_GRAPHICS_INTEGRATED_ONLY;
+	get_option(&hybrid_graphics_mode, "hybrid_graphics_mode");
+
+	if (hybrid_graphics_installed()) {
+		/* Select appropriate hybrid graphics device */
+		printk(BIOS_DEBUG, "Hybrid graphics available, ");
+		printk(BIOS_DEBUG, "setting mode %d\n", hybrid_graphics_mode);
+		switch (hybrid_graphics_mode) {
+		case HYBRID_GRAPHICS_INTEGRATED_ONLY:
+			configure_mux_gpio(GPIO_LEVEL_LOW);
+				sysinfo.enable_igd = 1;
+				sysinfo.enable_peg = 0;
+			break;
+		case HYBRID_GRAPHICS_DISCRETE_ONLY:
+			configure_mux_gpio(GPIO_LEVEL_HIGH);
+			sysinfo.enable_igd = 0;
+			sysinfo.enable_peg = 1;
+			break;
+		case HYBRID_GRAPHICS_SWITCHABLE:
+			configure_mux_gpio(GPIO_LEVEL_LOW);
+			sysinfo.enable_igd = 1;
+			sysinfo.enable_peg = 1;
+			break;
+		default:
+			configure_mux_gpio(GPIO_LEVEL_LOW);
+			sysinfo.enable_igd = 1;
+			sysinfo.enable_peg = 0;
+			break;
+		}
+	} else {
+		/*
+		 *The display is not connected to a mux if no hybrid graphics
+		 * is present
+		 */
+		printk(BIOS_DEBUG, "Hybrid graphics not installed\n");
+		sysinfo.enable_igd = 1;
+		sysinfo.enable_peg = 0;
+	}
+
 	/* ASPM related setting, set early by original BIOS. */
 	DMIBAR16(0x204) &= ~(3 << 10);
 
@@ -101,8 +167,6 @@ void mainboard_romstage_entry(unsigned long bist)
 	memset(&sysinfo, 0, sizeof(sysinfo));
 	sysinfo.spd_map[0] = 0x50;
 	sysinfo.spd_map[2] = 0x51;
-	sysinfo.enable_igd = 1;
-	sysinfo.enable_peg = 0;
 	get_gmch_info(&sysinfo);
 	raminit(&sysinfo, s3resume);