[coreboot-gerrit] Patch set updated for coreboot: soc/intel/apollolake: Add PM methods to power gate SD card

[Venkateswarlu V Vinjamuri (venkateswarlu.v.vinjamuri@intel.com)]

Venkateswarlu V Vinjamuri (venkateswarlu.v.vinjamuri at intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/18496

-gerrit

commit 094f8f0be2d6b69f0bdd025789b16fd046fbdc71
Author: Venkateswarlu Vinjamuri <venkateswarlu.v.vinjamuri at intel.com>
Date:   Fri Feb 24 15:37:30 2017 -0800

    soc/intel/apollolake: Add PM methods to power gate SD card
    
    This implements GNVS variable to store the address of GPIO_177.
    _PS0/_PS3 methods to power gate the sd card controller.
    
    BUG=chrome-os-partner:63070
    TEST=Suspend and resume using 'echo freeze > /sys/power/state'.
    System should enter S0ix and resume with no issue.
    
    Change-Id: Id2c42fc66062f0431385607cff1a83563eaeef87
    Signed-off-by: Venkateswarlu Vinjamuri <venkateswarlu.v.vinjamuri at intel.com>
---
 src/soc/intel/apollolake/acpi.c             |  4 +++
 src/soc/intel/apollolake/acpi/globalnvs.asl |  1 +
 src/soc/intel/apollolake/acpi/scs.asl       | 49 +++++++++++++++++++++++++++++
 src/soc/intel/apollolake/chip.h             |  3 ++
 src/soc/intel/apollolake/include/soc/nvs.h  |  3 +-
 5 files changed, 59 insertions(+), 1 deletion(-)

diff --git a/src/soc/intel/apollolake/acpi.c b/src/soc/intel/apollolake/acpi.c
index 3c1faa5..6aa985d 100644
--- a/src/soc/intel/apollolake/acpi.c
+++ b/src/soc/intel/apollolake/acpi.c
@@ -183,6 +183,10 @@ static void acpi_create_gnvs(struct global_nvs_t *gnvs)
 	/* Assign address of PERST_0 if GPIO is defined in devicetree */
 	if (cfg->prt0_gpio != GPIO_PRT0_UDEF)
 		gnvs->prt0 = (uintptr_t)gpio_dwx_address(cfg->prt0_gpio);
+
+	/* Assign Gpio address of SDCARD Card detect */
+	gnvs->sdcd = (uintptr_t)gpio_dwx_address(cfg->sdcard_cd_gpio);
+
 }
 
 /* Save wake source information for calculating ACPI _SWS values */
diff --git a/src/soc/intel/apollolake/acpi/globalnvs.asl b/src/soc/intel/apollolake/acpi/globalnvs.asl
index 657c834..947120d 100644
--- a/src/soc/intel/apollolake/acpi/globalnvs.asl
+++ b/src/soc/intel/apollolake/acpi/globalnvs.asl
@@ -39,6 +39,7 @@ Field (GNVS, ByteAcc, NoLock, Preserve)
 	NHLA,	64,     // 0x19 - 0x20 - NHLT Address
 	NHLL,	32,     // 0x21 - 0x24 - NHLT Length
 	PRT0,	32,     // 0x25 - 0x28 - PERST_0 Address
+	SDCD,	32,     // 0x29 - 0x2D - SD_CD Address
 
 	/* ChromeOS stuff (0x100 -> 0xfff, size 0xeff) */
 	Offset (0x100),
diff --git a/src/soc/intel/apollolake/acpi/scs.asl b/src/soc/intel/apollolake/acpi/scs.asl
index 4108017..ddc239e 100644
--- a/src/soc/intel/apollolake/acpi/scs.asl
+++ b/src/soc/intel/apollolake/acpi/scs.asl
@@ -22,6 +22,9 @@ Scope (\_SB.PCI0) {
 	Field (SBMM, DWordAcc, NoLock, Preserve)
 	{
 		GENR, 32,
+		Offset (0x08),
+		,  5,
+		GRR3,  1,
 	}
 
 	/* SCC power gate control method, this method must be serialized as
@@ -64,4 +67,50 @@ Scope (\_SB.PCI0) {
 			^^SCPG(1,0x00000041)
 		}
 	} /* Device (SDHA) */
+
+	/* SD CARD */
+	Device (SDC)
+	{
+		Name (_ADR, 0x001B0000)
+
+		Name (RBUF, ResourceTemplate ()
+		{
+			GpioInt (Edge, ActiveBoth, SharedAndWake, PullNone, 0,
+			"\\_SB.GPO3", 0, ResourceConsumer, , ) {26}
+		})
+
+		Method (_CRS, 0x0, NotSerialized)
+		{
+			Return (RBUF)
+		}
+
+		OperationRegion (PCCS, PCI_Config, 0x84, 0x04)
+		Field (PCCS, WordAcc, NoLock, Preserve) {
+			PMSR,    32    /* 4h: Power Gating Control */
+		}
+
+		Method (_PS0, 0, NotSerialized)
+		{
+
+			/* Extract the RXstate of SDcard Card detect pin */
+			Store (\_SB.GPC0 (\SDCD), Local1)
+			And (Local1, 0x2, Local1)
+			Not (Local1, \_SB.PCI0.GRR3)
+
+			/* Disable power gate by clearing bit 1 and 0 */
+			And (^PMSR, 0xFFFFFFFC, ^PMSR)
+			/* Sleep 2 ms */
+			Sleep (2)
+		}
+
+		Method (_PS3, 0, NotSerialized)
+		{
+
+			/* Enable power gate by restore bit 1 and 0 */
+			Store (0, \_SB.PCI0.GRR3)
+			Or (^PMSR, 0x3, ^PMSR)
+
+		}
+
+	} /* Device (SDC) */
 }
diff --git a/src/soc/intel/apollolake/chip.h b/src/soc/intel/apollolake/chip.h
index d60ffbf..22d3b4e 100644
--- a/src/soc/intel/apollolake/chip.h
+++ b/src/soc/intel/apollolake/chip.h
@@ -117,6 +117,9 @@ struct soc_intel_apollolake_config {
 	/* GPIO pin for PERST_0 */
 	uint16_t prt0_gpio;
 
+	/* GPIO pin for SDCARD Card Detect */
+	uint16_t sdcard_cd_gpio;
+
 	/* USB2 eye diagram settings per port */
 	struct usb2_eye_per_port usb2eye[APOLLOLAKE_USB2_PORT_MAX];
 
diff --git a/src/soc/intel/apollolake/include/soc/nvs.h b/src/soc/intel/apollolake/include/soc/nvs.h
index 21894ca..1e774b8 100644
--- a/src/soc/intel/apollolake/include/soc/nvs.h
+++ b/src/soc/intel/apollolake/include/soc/nvs.h
@@ -39,7 +39,8 @@ typedef struct global_nvs_t {
 	uint64_t	nhla; /* 0x19 - 0x20 - NHLT Address */
 	uint32_t	nhll; /* 0x21 - 0x24 - NHLT Length */
 	uint32_t	prt0; /* 0x25 - 0x28 - PERST_0 Address */
-	uint8_t		unused[215];
+	uint32_t	sdcd; /* 0x29 - 0x2D - SD_CD Address */
+	uint8_t		unused[211];
 
 	/* ChromeOS specific (0x100 - 0xfff) */
 	chromeos_acpi_t chromeos;