[coreboot-gerrit] Patch set updated for coreboot: nb/intel/x4x: Add support for second PEG slot

[Arthur Heymans (arthur@aheymans.xyz)]

Arthur Heymans (arthur at aheymans.xyz) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/18516

-gerrit

commit e3e8fe6f14fe7aa8ea8207b31d6e3f643b62a308
Author: Arthur Heymans <arthur at aheymans.xyz>
Date:   Mon Feb 27 21:45:07 2017 +0100

    nb/intel/x4x: Add support for second PEG slot
    
    Is only present on the P45 subtype of chipset.
    
    Change-Id: I6b138db6654c83c40b5ca4b65d6ccd51ad4277fa
    Signed-off-by: Arthur Heymans <arthur at aheymans.xyz>
---
 src/northbridge/intel/x4x/northbridge.c | 11 +++++++++--
 1 file changed, 9 insertions(+), 2 deletions(-)

diff --git a/src/northbridge/intel/x4x/northbridge.c b/src/northbridge/intel/x4x/northbridge.c
index 8f2068d..7cf778a 100644
--- a/src/northbridge/intel/x4x/northbridge.c
+++ b/src/northbridge/intel/x4x/northbridge.c
@@ -182,8 +182,12 @@ static void x4x_init(void *const chip_info)
 	struct device *const d0f0 = dev_find_slot(0, 0);
 
 	/* Hide internal functions based on devicetree info. */
-	for (dev = 3; dev > 0; --dev) {
+	for (dev = 6; dev > 0; --dev) {
 		switch (dev) {
+		case 6: /* PEG1: only on P45 */
+			fn = 0;
+			bit_base = 13;
+			break;
 		case 3: /* ME */
 			fn = 3;
 			bit_base = 6;
@@ -192,10 +196,13 @@ static void x4x_init(void *const chip_info)
 			fn = 1;
 			bit_base = 3;
 			break;
-		case 1: /* PEG */
+		case 1: /* PEG0 */
 			fn = 0;
 			bit_base = 1;
 			break;
+		case 4: /* Should not happen */
+		case 5:
+			continue;
 		}
 		for (; fn >= 0; --fn) {
 			const struct device *const d =