[coreboot-gerrit] New patch to review for coreboot: nb/x4x/raminit.c: Remove ME locking code

[Arthur Heymans (arthur@aheymans.xyz)]

Arthur Heymans (arthur at aheymans.xyz) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/18513

-gerrit

commit 7b2e14523348dae8598afa48ec2b32d3e31f9f14
Author: Arthur Heymans <arthur at aheymans.xyz>
Date:   Mon Feb 27 16:27:21 2017 +0100

    nb/x4x/raminit.c: Remove ME locking code
    
    This code ought not to run if ME is disabled. It also prohibits
    writing to some GMCH regs like GGC bit1.
    
    Change-Id: Iaa8646e535e13c44c010ccd434a5af954cf7dfbc
    Signed-off-by: Arthur Heymans <arthur at aheymans.xyz>
---
 src/northbridge/intel/x4x/raminit_ddr2.c | 20 ++++++++++++--------
 1 file changed, 12 insertions(+), 8 deletions(-)

diff --git a/src/northbridge/intel/x4x/raminit_ddr2.c b/src/northbridge/intel/x4x/raminit_ddr2.c
index 9c414e2..51a98e7 100644
--- a/src/northbridge/intel/x4x/raminit_ddr2.c
+++ b/src/northbridge/intel/x4x/raminit_ddr2.c
@@ -2155,15 +2155,19 @@ void raminit_ddr2(struct sysinfo *s)
 	printk(BIOS_DEBUG, "Done power settings\n");
 
 	// ME related
-	if (RANK_IS_POPULATED(s->dimms, 0, 0)
-			|| RANK_IS_POPULATED(s->dimms, 1, 0)) {
-		MCHBAR8(0xa2f) = MCHBAR8(0xa2f) | (1 << 0);
+	/*
+	 * FIXME: This locks some registers like bit1 of GGC
+	 * and is only needed in case of ME being used.
+	 */
+	if (ME_UMA_SIZEMB != 0) {
+		if (RANK_IS_POPULATED(s->dimms, 0, 0)
+			|| RANK_IS_POPULATED(s->dimms, 1, 0))
+			MCHBAR8(0xa2f) = MCHBAR8(0xa2f) | (1 << 0);
+		if (RANK_IS_POPULATED(s->dimms, 0, 1)
+			|| RANK_IS_POPULATED(s->dimms, 1, 1))
+			MCHBAR8(0xa2f) = MCHBAR8(0xa2f) | (1 << 1);
+		MCHBAR32(0xa30) = MCHBAR32(0xa30) | (1 << 26);
 	}
-	if (RANK_IS_POPULATED(s->dimms, 0, 1)
-			|| RANK_IS_POPULATED(s->dimms, 1, 1)) {
-		MCHBAR8(0xa2f) = MCHBAR8(0xa2f) | (1 << 1);
-	}
-	MCHBAR32(0xa30) = MCHBAR32(0xa30) | (1 << 26);
 
 	printk(BIOS_DEBUG, "Done ddr2\n");
 }