[coreboot-gerrit] New patch to review for coreboot: soc/intel/skylake: Clean up bootblock/systemagent.c

Subrata Banik (subrata.banik@intel.com) gerrit at coreboot.org
Mon Feb 27 06:37:34 CET 2017


Subrata Banik (subrata.banik at intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/18505

-gerrit

commit 84d740468f8ab653d94b87c67d608a646be2e508
Author: Subrata Banik <subrata.banik at intel.com>
Date:   Mon Feb 27 11:02:19 2017 +0530

    soc/intel/skylake: Clean up bootblock/systemagent.c
    
    Don't need to touch  PCIEXBAR reserve bit, hence removed.
    
    Change-Id: I800fc73d49c83e35ac9ceefec5419af21ddbae2a
    Signed-off-by: Subrata Banik <subrata.banik at intel.com>
---
 src/soc/intel/skylake/bootblock/systemagent.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/soc/intel/skylake/bootblock/systemagent.c b/src/soc/intel/skylake/bootblock/systemagent.c
index e76d4d2..0ce4c6c 100644
--- a/src/soc/intel/skylake/bootblock/systemagent.c
+++ b/src/soc/intel/skylake/bootblock/systemagent.c
@@ -38,6 +38,6 @@ void bootblock_systemagent_early_init(void)
 	 */
 	reg = 0;
 	pci_io_write_config32(SA_DEV_ROOT, PCIEXBAR + 4, reg);
-	reg = CONFIG_MMCONF_BASE_ADDRESS | 4 | 1; /* 64MiB - 0-63 buses. */
+	reg = CONFIG_MMCONF_BASE_ADDRESS | 1; /* 64MiB - 0-63 buses. */
 	pci_io_write_config32(SA_DEV_ROOT, PCIEXBAR, reg);
 }



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