[coreboot-gerrit] New patch to review for coreboot: mainboard/google/reef: Configure SDCARD card detect pin

Venkateswarlu V Vinjamuri (venkateswarlu.v.vinjamuri@intel.com) gerrit at coreboot.org
Sat Feb 25 04:39:31 CET 2017


Venkateswarlu V Vinjamuri (venkateswarlu.v.vinjamuri at intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/18497

-gerrit

commit 993a082a5b6036fe86220f3171be089d895993d9
Author: Venkateswarlu Vinjamuri <venkateswarlu.v.vinjamuri at intel.com>
Date:   Fri Feb 24 15:54:39 2017 -0800

    mainboard/google/reef: Configure SDCARD card detect pin
    
    This configures GPIO_177 as GPI for SDCARD card detect.
    
    BUG=chrome-os-partner:63070
    TEST=None
    
    Change-Id: Ia8aef60bd7d0ea36afb39f76fab051aa46a2ed64
    Signed-off-by: Venkateswarlu Vinjamuri <venkateswarlu.v.vinjamuri at intel.com>
---
 src/mainboard/google/reef/variants/baseboard/devicetree.cb | 3 +++
 src/mainboard/google/reef/variants/baseboard/gpio.c        | 2 +-
 2 files changed, 4 insertions(+), 1 deletion(-)

diff --git a/src/mainboard/google/reef/variants/baseboard/devicetree.cb b/src/mainboard/google/reef/variants/baseboard/devicetree.cb
index b0c82e2..443918e 100644
--- a/src/mainboard/google/reef/variants/baseboard/devicetree.cb
+++ b/src/mainboard/google/reef/variants/baseboard/devicetree.cb
@@ -17,6 +17,9 @@ chip soc/intel/apollolake
 	# If the Board does not have PERST_0, assign GPIO_PRT0_UDEF
 	register "prt0_gpio" = "GPIO_122"
 
+	# GPIO for SD card detect
+	register "sdcard_cd_gpio" = "GPIO_177"
+
 	# EMMC TX DATA Delay 1
 	# Refer to EDS-Vol2-22.3.
 	# [14:8] steps of delay for HS400, each 125ps.
diff --git a/src/mainboard/google/reef/variants/baseboard/gpio.c b/src/mainboard/google/reef/variants/baseboard/gpio.c
index a9a6248..75ab638 100644
--- a/src/mainboard/google/reef/variants/baseboard/gpio.c
+++ b/src/mainboard/google/reef/variants/baseboard/gpio.c
@@ -59,7 +59,7 @@ static const struct pad_config gpio_table[] = {
 	PAD_CFG_NF(GPIO_175, UP_20K, DEEP, NF1), /* SDCARD_D2 */
 	PAD_CFG_NF(GPIO_176, UP_20K, DEEP, NF1), /* SDCARD_D3 */
 	/* Card detect is active LOW with external pull up. */
-	PAD_CFG_NF(GPIO_177, NONE, DEEP, NF1), /* SDCARD_CD_N */
+	PAD_CFG_GPI(GPIO_177, NONE, DEEP),	 /* SDCARD_CD_N */
 	PAD_CFG_NF(GPIO_178, UP_20K, DEEP, NF1), /* SDCARD_CMD */
 	/* CLK feedback, internal signal, needs 20K pull down */
 	PAD_CFG_NF(GPIO_179, DN_20K, DEEP, NF1), /* SDCARD_CLK_FB */



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