[coreboot-gerrit] Patch set updated for coreboot: [Needs test] i945/raminit: Correct C0DRAMW & C1DRAMW for 4 DIMMs
HAOUAS Elyes (ehaouas@noos.fr)
gerrit at coreboot.org
Fri Feb 24 07:49:13 CET 2017
HAOUAS Elyes (ehaouas at noos.fr) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/18387
-gerrit
commit 33cc2ca8bf134a465f05ea3f753c57d68f6a8b84
Author: Elyes HAOUAS <ehaouas at noos.fr>
Date: Sat Feb 18 14:22:33 2017 +0100
[Needs test] i945/raminit: Correct C0DRAMW & C1DRAMW for 4 DIMMs
Change-Id: Ib1f999447b37a1524d589552ea2eec640c2a2c7e
Signed-off-by: Elyes HAOUAS <ehaouas at noos.fr>
---
src/northbridge/intel/i945/raminit.c | 37 +++++++++++++++++-------------------
1 file changed, 17 insertions(+), 20 deletions(-)
diff --git a/src/northbridge/intel/i945/raminit.c b/src/northbridge/intel/i945/raminit.c
index cc227cc..214bebd 100644
--- a/src/northbridge/intel/i945/raminit.c
+++ b/src/northbridge/intel/i945/raminit.c
@@ -857,33 +857,30 @@ static void sdram_verify_burst_length(struct sys_info * sysinfo)
static void sdram_program_dram_width(struct sys_info * sysinfo)
{
u16 c0dramw = 0, c1dramw = 0;
- int idx;
+ int i, idx;
if (sysinfo->dual_channel)
idx = 2;
else
idx = 1;
- switch (sysinfo->dimm[0]) {
- case 0: c0dramw = 0x0000; break; /* x16DS */
- case 1: c0dramw = 0x0001; break; /* x8DS */
- case 2: c0dramw = 0x0000; break; /* x16SS */
- case 3: c0dramw = 0x0005; break; /* x8DDS */
- case 4: c0dramw = 0x0000; break; /* NC */
- }
-
- switch (sysinfo->dimm[idx]) {
- case 0: c1dramw = 0x0000; break; /* x16DS */
- case 1: c1dramw = 0x0010; break; /* x8DS */
- case 2: c1dramw = 0x0000; break; /* x16SS */
- case 3: c1dramw = 0x0050; break; /* x8DDS */
- case 4: c1dramw = 0x0000; break; /* NC */
+ for (i = 0; i < DIMM_SOCKETS; i++) { /* Channel A */
+ switch (sysinfo->dimm[i]) {
+ case SYSINFO_DIMM_X16DS: c0dramw |= (0x0000) << 4*(i%2); break;
+ case SYSINFO_DIMM_X8DS: c0dramw |= (0x0001) << 4*(i%2); break;
+ case SYSINFO_DIMM_X16SS: c0dramw |= (0x0000) << 4*(i%2); break;
+ case SYSINFO_DIMM_X8DDS: c0dramw |= (0x0005) << 4*(i%2); break;
+ case SYSINFO_DIMM_NOT_POPULATED: c0dramw |= (0x0000) << 4*(i%2); break;
+ }
}
-
- if ( !sdram_capabilities_dual_channel() ) {
- /* Single Channel */
- c0dramw |= c1dramw;
- c1dramw = 0;
+ for (i = DIMM_SOCKETS; i < idx * DIMM_SOCKETS; i++) { /* Channel B */
+ switch (sysinfo->dimm[i]) {
+ case SYSINFO_DIMM_X16DS: c1dramw |= (0x0000) << 4*(i%2); break;
+ case SYSINFO_DIMM_X8DS: c1dramw |= (0x0001) << 4*(i%2); break;
+ case SYSINFO_DIMM_X16SS: c1dramw |= (0x0000) << 4*(i%2); break;
+ case SYSINFO_DIMM_X8DDS: c1dramw |= (0x0005) << 4*(i%2); break;
+ case SYSINFO_DIMM_NOT_POPULATED: c1dramw |= (0x0000) << 4*(i%2); break;
+ }
}
MCHBAR16(C0DRAMW) = c0dramw;
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