[coreboot-gerrit] Patch set updated for coreboot: soc/intel/glk: Use intel/common/basecode/bootblock stage
Subrata Banik (subrata.banik@intel.com)
gerrit at coreboot.org
Thu Feb 23 12:49:03 CET 2017
Subrata Banik (subrata.banik at intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/18458
-gerrit
commit d656d40236d94b72cfe17045e81d4cfe0a1e75cd
Author: Subrata Banik <subrata.banik at intel.com>
Date: Wed Feb 22 19:26:33 2017 +0530
soc/intel/glk: Use intel/common/basecode/bootblock stage
TEST=Booted till post code 0x2b and ensure its execute
PCIEXBAR programming bootblock_systemagent_early_init()
Change-Id: I86bd9e777e23ca1a77008ea9b087d45aec382ccc
Signed-off-by: Subrata Banik <subrata.banik at intel.com>
---
src/soc/intel/glk/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/src/soc/intel/glk/Kconfig b/src/soc/intel/glk/Kconfig
index f2fe32f..bf3fa87 100644
--- a/src/soc/intel/glk/Kconfig
+++ b/src/soc/intel/glk/Kconfig
@@ -47,6 +47,7 @@ config CPU_SPECIFIC_OPTIONS
select RELOCATABLE_RAMSTAGE # Build fails if this is not selected
select RTC
select SMM_TSEG
+ select SOC_INTEL_BASECODE
select SOC_INTEL_CAR_SMALL_CORE
select SOC_INTEL_COMMON
select SOC_INTEL_COMMON_ACPI
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