[coreboot-gerrit] New patch to review for coreboot: amd/gardenia: Add cbmem_init to romstage

[Marc Jones (marc@marcjonesconsulting.com)]

Marc Jones (marc at marcjonesconsulting.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/18429

-gerrit

commit 2fa9d4473d342518d31220e8001c34934cd2535c
Author: Marshall Dawson <marshalldawson3rd at gmail.com>
Date:   Sun Jan 8 14:49:15 2017 -0500

    amd/gardenia: Add cbmem_init to romstage
    
    When EARLY_CBMEM_INIT is in effect, initialize cbmem during the mainboard's
    romstage.
    
    Original-Signed-off-by: Marshall Dawson <marshalldawson3rd at gmail.com>
    Original-Reviewed-by: Marc Jones <marcj303 at gmail.com>
    (cherry picked from commit dbea129a63fa11e9f582075b432fdda3cc5b2a9c)
    
    Change-Id: Ic336213580c4c8bf7e3b42c9adbbf0051982fec4
    Signed-off-by: Marc Jones <marcj303 at gmail.com>
---
 src/mainboard/amd/gardenia/romstage.c | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/src/mainboard/amd/gardenia/romstage.c b/src/mainboard/amd/gardenia/romstage.c
index eca9d3b..2b495c8 100644
--- a/src/mainboard/amd/gardenia/romstage.c
+++ b/src/mainboard/amd/gardenia/romstage.c
@@ -14,6 +14,7 @@
  */
 
 #include <console/console.h>
+#include <cbmem.h>
 #include <arch/acpi.h>
 #include <arch/io.h>
 #include <arch/stages.h>
@@ -66,8 +67,14 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 	if (!s3resume) {
 		post_code(0x40);
 		AGESAWRAPPER(amdinitpost);
+
+#if IS_ENABLED(CONFIG_EARLY_CBMEM_INIT)
+		cbmem_initialize_empty();
+#endif
+
 		post_code(0x41);
 		AGESAWRAPPER(amdinitenv);
+
 		/* TODO: Disable cache is not ok. */
 		disable_cache_as_ram();
 	} else { /* S3 detect */