[coreboot-gerrit] Patch merged into coreboot/master: soc/intel/skylake: Add support for SPI device

[gerrit at coreboot.org]

the following patch was just integrated into master:
commit 0de80da24cc39003f61f86452f46c9b48c95ae4d
Author: Furquan Shaikh <furquan at chromium.org>
Date:   Sat Feb 11 11:06:19 2017 -0800

    soc/intel/skylake: Add support for SPI device
    
    Add a new PCI driver for SPI devices with supported PCI ids. Also,
    provide a translation table to convert struct device structure into SPI
    bus number.
    
    BUG=chrome-os-partner:59832
    BRANCH=None
    TEST=Compiles successfully
    
    Change-Id: If860eb819f2ce5ae5443f808b356af57f86c52be
    Signed-off-by: Furquan Shaikh <furquan at chromium.org>
    Reviewed-on: https://review.coreboot.org/18341
    Tested-by: build bot (Jenkins)
    Reviewed-by: Duncan Laurie <dlaurie at chromium.org>


See https://review.coreboot.org/18341 for details.

-gerrit