[coreboot-gerrit] Patch set updated for coreboot: Revert "nb/amd/mct_ddr3: Fix RDIMM training failure on Fam15h"

[Timothy Pearson (tpearson@raptorengineering.com)]

Timothy Pearson (tpearson at raptorengineering.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/18369

-gerrit

commit 7a4e01c362d5670c99f3b0e5e1e7b414de9cbd8f
Author: Daniel Kulesz <daniel.ina1 at googlemail.com>
Date:   Wed Feb 15 14:35:43 2017 +0100

    Revert "nb/amd/mct_ddr3: Fix RDIMM training failure on Fam15h"
    
    This reverts commit fec8872c9dee4411ba1a89fc8ec833a700b476c6.
    
    The commit introduced a regression which is causing MC4 failures
    when 8 RDIMMs are populated in a configuration with a single CPU
    package. Using just 4 RDIMMs, the failure does not occur.
    
    After reverting the commit, I tested configurations with
    1 CPU (8x8=64GB) and 2 CPU packages (16x8=128GB) using an
    Opteron 6276. The MC4 failures did not occur anymore.
    
    Change-Id: Ic6c9de84c38f772919597950ba540a3b5de68a65
    Signed-off-by: Daniel Kulesz <daniel.ina1 at googlemail.com>
---
 src/northbridge/amd/amdmct/mct_ddr3/mctproc.c | 3 ---
 1 file changed, 3 deletions(-)

diff --git a/src/northbridge/amd/amdmct/mct_ddr3/mctproc.c b/src/northbridge/amd/amdmct/mct_ddr3/mctproc.c
index 48658f5..ecdd4a2 100644
--- a/src/northbridge/amd/amdmct/mct_ddr3/mctproc.c
+++ b/src/northbridge/amd/amdmct/mct_ddr3/mctproc.c
@@ -72,9 +72,6 @@ u32 mct_SetDramConfigMisc2(struct DCTStatStruc *pDCTstat,
 		misc2 |= ((cs_mux_67 & 0x1) << 27);
 		misc2 &= ~(0x1 << 26);		/* CsMux45 = cs_mux_45 */
 		misc2 |= ((cs_mux_45 & 0x1) << 26);
-
-		if (pDCTstat->Status & (1 << SB_Registered))
-			misc2 |= 1 << SubMemclkRegDly;
 	} else if (pDCTstat->LogicalCPUID & (AMD_DR_Dx | AMD_DR_Cx)) {
 		if (pDCTstat->Status & (1 << SB_Registered)) {
 			misc2 |= 1 << SubMemclkRegDly;