[coreboot-gerrit] Patch set updated for coreboot: mb/google/poppy: Add camera support
Rizwan Qureshi (rizwan.qureshi@intel.com)
gerrit at coreboot.org
Wed Feb 15 16:21:02 CET 2017
Rizwan Qureshi (rizwan.qureshi at intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/18081
-gerrit
commit 085727d25394f1403ec4b2f3c7a0491a40c6480c
Author: Rizwan Qureshi <rizwan.qureshi at intel.com>
Date: Tue Jan 10 08:42:07 2017 +0530
mb/google/poppy: Add camera support
Enable OV camera and TPS68470 PMIC support.
Also enable the SA Imaging Unit and CIO2 devices.
BUG=None
BRANCH=None
TEST=CIO2 and IMGU devices listed by lspci, SSDT table has the required
ACPI entries.
Change-Id: I5d8a1eb775029e949aeb3de26d8bae10a9d531b8
Signed-off-by: Rizwan Qureshi <rizwan.qureshi at intel.com>
---
src/mainboard/google/poppy/Kconfig | 2 +
src/mainboard/google/poppy/devicetree.cb | 128 ++++++++++++++++++++++++++++++-
2 files changed, 127 insertions(+), 3 deletions(-)
diff --git a/src/mainboard/google/poppy/Kconfig b/src/mainboard/google/poppy/Kconfig
index 6cdbdd6..937de73 100644
--- a/src/mainboard/google/poppy/Kconfig
+++ b/src/mainboard/google/poppy/Kconfig
@@ -4,6 +4,8 @@ config BOARD_SPECIFIC_OPTIONS
def_bool y
select BOARD_ID_AUTO
select BOARD_ROMSIZE_KB_16384
+ select DRIVERS_I2C_TPS68470
+ select DRIVERS_I2C_OV_CAMERA
select EC_GOOGLE_CHROMEEC
select EC_GOOGLE_CHROMEEC_LPC
select HAVE_ACPI_RESUME
diff --git a/src/mainboard/google/poppy/devicetree.cb b/src/mainboard/google/poppy/devicetree.cb
index 38d58c7..e3d6393 100644
--- a/src/mainboard/google/poppy/devicetree.cb
+++ b/src/mainboard/google/poppy/devicetree.cb
@@ -33,7 +33,8 @@ chip soc/intel/skylake
register "XdciEnable" = "0"
register "SsicPortEnable" = "0"
register "SmbusEnable" = "1"
- register "Cio2Enable" = "0"
+ register "Cio2Enable" = "1"
+ register "SaImguEnable" = "1"
register "ScsEmmcEnabled" = "1"
register "ScsEmmcHs400Enabled" = "1"
register "ScsSdCardEnabled" = "2"
@@ -207,7 +208,75 @@ chip soc/intel/skylake
end
end # I2C #0
device pci 15.1 on end # I2C #1
- device pci 15.2 on end # I2C #2
+ device pci 15.2 on
+ chip drivers/i2c/tps68470
+ # PMIC CLDB Buffer
+ register "cldb_buf" = "{ \
+ 0x00, 0x02, 0x00, 0x50,\
+ 0x00, 0x00, 0x00, 0x00,\
+ 0x00, 0x00, 0x00, 0x00,\
+ 0x00, 0x00, 0x00, 0x00,\
+ 0x00, 0x00, 0x00, 0x00,\
+ 0x00, 0x00, 0x00, 0x00,\
+ 0x00, 0x00, 0x00, 0x00,\
+ 0x00, 0x00, 0x00, 0x00\
+ }"
+ device i2c 4d on end
+ end
+ chip drivers/i2c/ov_camera
+ register "acpi_hid" = ""OVTID850""
+ register "acpi_name" = ""CAM0""
+ register "acpi_uid" = "0"
+ register "vcm_addr" = "0xc"
+ register "eeprom0_addr" = "0x50"
+
+ # Camera SSDB Buffer
+ register "buf.ssdb.version" = "0x00"
+ register "buf.ssdb.sensor_card_sku" = "0x50"
+
+ register "buf.ssdb.csi2_data_stream_interface" = "{ \
+ 0x00, 0x00, 0x00, 0x00, \
+ 0x00, 0x00, 0x00, 0x00, \
+ 0x00, 0x00, 0x00, 0x00, \
+ 0x00, 0x00, 0x00, 0x00, \
+ }"
+
+ register "buf.ssdb.bdf_value" = "0x00"
+ register "buf.ssdb.dphy_link_en_fuses" = "0x00"
+ register "buf.ssdb.lanes_clock_division" = "0x00"
+ register "buf.ssdb.link_used" = "0x00"
+ register "buf.ssdb.lanes_used" = "0x04"
+ register "buf.ssdb.csi_rx_dly_cnt_termen_clane" = "0x00"
+ register "buf.ssdb.csi_rx_dly_cnt_settle_clane" = "0x00"
+ register "buf.ssdb.csi_rx_dly_cnt_termen_dlane0" = "0x00"
+ register "buf.ssdb.csi_rx_dly_cnt_settle_dlane0" = "0x00"
+ register "buf.ssdb.csi_rx_dly_cnt_termen_dlane1" = "0x00"
+ register "buf.ssdb.csi_rx_dly_cnt_settle_dlane1" = "0x00"
+ register "buf.ssdb.csi_rx_dly_cnt_termen_dlane2" = "0x00"
+ register "buf.ssdb.csi_rx_dly_cnt_settle_dlane2" = "0x00"
+ register "buf.ssdb.csi_rx_dly_cnt_termen_dlane3" = "0x00"
+ register "buf.ssdb.csi_rx_dly_cnt_settle_dlane3" = "0x00"
+ register "buf.ssdb.max_lane_speed" = "0x00"
+ register "buf.ssdb.sensor_calibration_file_index" = "0x00"
+ register "buf.ssdb.sensor_calibration_file_index_mbz" = "{0x00, 0x00, 0x00}"
+ register "buf.ssdb.rom_type" = "0x08"
+ register "buf.ssdb.vcm_type" = "0x03"
+ register "buf.ssdb.platform" = "0x09"
+ register "buf.ssdb.platform_sub" = "0x00"
+ register "buf.ssdb.flash_support" = "0x02"
+ register "buf.ssdb.privacy_led" = "0x01"
+ register "buf.ssdb.degree" = "0x00"
+ register "buf.ssdb.mipi_define" = "0x01"
+ register "buf.ssdb.mclk" = "0x016E3600"
+ register "buf.ssdb.control_logic_id" = "0x00"
+ register "buf.ssdb.mipi_data_format" = "0x00"
+ register "buf.ssdb.silicon_version" = "0x00"
+ register "buf.ssdb.customer_id" = "0x00"
+
+ device i2c 10 on end
+ end
+
+ end # I2C #2
device pci 15.3 on end # I2C #3
device pci 16.0 on end # Management Engine Interface 1
device pci 16.1 off end # Management Engine Interface 2
@@ -240,7 +309,60 @@ chip soc/intel/skylake
device i2c 13 on end
end
end # I2C #5
- device pci 19.2 on end # I2C #4
+ device pci 19.2 on
+ chip drivers/i2c/ov_camera
+ register "acpi_hid" = ""INT3479""
+ register "acpi_name" = ""CAM1""
+ register "acpi_uid" = "0"
+ register "vcm_addr" = "0xc"
+ register "eeprom0_addr" = "0x50"
+
+ # Camera SSDB Buffer
+ register "buf.ssdb.version" = "0x00"
+ register "buf.ssdb.sensor_card_sku" = "0x50"
+
+ register "buf.ssdb.csi2_data_stream_interface" = "{ \
+ 0x00, 0x00, 0x00, 0x00, \
+ 0x00, 0x00, 0x00, 0x00, \
+ 0x00, 0x00, 0x00, 0x00, \
+ 0x00, 0x00, 0x00, 0x00, \
+ }"
+
+ register "buf.ssdb.bdf_value" = "0x00"
+ register "buf.ssdb.dphy_link_en_fuses" = "0x00"
+ register "buf.ssdb.lanes_clock_division" = "0x00"
+ register "buf.ssdb.link_used" = "0x01"
+ register "buf.ssdb.lanes_used" = "0x02"
+ register "buf.ssdb.csi_rx_dly_cnt_termen_clane" = "0x00"
+ register "buf.ssdb.csi_rx_dly_cnt_settle_clane" = "0x00"
+ register "buf.ssdb.csi_rx_dly_cnt_termen_dlane0" = "0x00"
+ register "buf.ssdb.csi_rx_dly_cnt_settle_dlane0" = "0x00"
+ register "buf.ssdb.csi_rx_dly_cnt_termen_dlane1" = "0x00"
+ register "buf.ssdb.csi_rx_dly_cnt_settle_dlane1" = "0x00"
+ register "buf.ssdb.csi_rx_dly_cnt_termen_dlane2" = "0x00"
+ register "buf.ssdb.csi_rx_dly_cnt_settle_dlane2" = "0x00"
+ register "buf.ssdb.csi_rx_dly_cnt_termen_dlane3" = "0x00"
+ register "buf.ssdb.csi_rx_dly_cnt_settle_dlane3" = "0x00"
+ register "buf.ssdb.max_lane_speed" = "0x00"
+ register "buf.ssdb.sensor_calibration_file_index" = "0x00"
+ register "buf.ssdb.sensor_calibration_file_index_mbz" = "{0x00, 0x00, 0x00}"
+ register "buf.ssdb.rom_type" = "0x08"
+ register "buf.ssdb.vcm_type" = "0x03"
+ register "buf.ssdb.platform" = "0x09"
+ register "buf.ssdb.platform_sub" = "0x00"
+ register "buf.ssdb.flash_support" = "0x02"
+ register "buf.ssdb.privacy_led" = "0x01"
+ register "buf.ssdb.degree" = "0x00"
+ register "buf.ssdb.mipi_define" = "0x01"
+ register "buf.ssdb.mclk" = "0x016E3600"
+ register "buf.ssdb.control_logic_id" = "0x00"
+ register "buf.ssdb.mipi_data_format" = "0x00"
+ register "buf.ssdb.silicon_version" = "0x00"
+ register "buf.ssdb.customer_id" = "0x00"
+
+ device i2c 10 on end
+ end
+ end # I2C #4
device pci 1c.0 on
chip drivers/intel/wifi
register "wake" = "GPE0_PCI_EXP"
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