[coreboot-gerrit] Patch set updated for coreboot: soc/intel/apollolake: Use intel/common/xhci driver
Subrata Banik (subrata.banik@intel.com)
gerrit at coreboot.org
Fri Feb 10 13:13:46 CET 2017
Subrata Banik (subrata.banik at intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/18222
-gerrit
commit 4a4e5bced484690d9e01d2c06562fbbc2ae6b9ba
Author: Subrata Banik <subrata.banik at intel.com>
Date: Tue Jan 24 18:54:58 2017 +0530
soc/intel/apollolake: Use intel/common/xhci driver
Change-Id: If161b1e11041ea7a380222ba555f14cd114de617
Signed-off-by: Subrata Banik <subrata.banik at intel.com>
---
src/soc/intel/apollolake/Kconfig | 1 +
src/soc/intel/apollolake/Makefile.inc | 2 +-
src/soc/intel/apollolake/xhci.c | 105 ----------------------------------
3 files changed, 2 insertions(+), 106 deletions(-)
diff --git a/src/soc/intel/apollolake/Kconfig b/src/soc/intel/apollolake/Kconfig
index b37cde6..afd617e 100644
--- a/src/soc/intel/apollolake/Kconfig
+++ b/src/soc/intel/apollolake/Kconfig
@@ -53,6 +53,7 @@ config CPU_SPECIFIC_OPTIONS
select SOC_INTEL_COMMON_LPSS_I2C
select SOC_INTEL_COMMON_SMI
select SOC_INTEL_COMMON_SPI_FLASH_PROTECT
+ select SOC_INTEL_XHCI_DRIVER
select UDELAY_TSC
select TSC_CONSTANT_RATE
select TSC_MONOTONIC_TIMER
diff --git a/src/soc/intel/apollolake/Makefile.inc b/src/soc/intel/apollolake/Makefile.inc
index 5a65f43..1284708 100644
--- a/src/soc/intel/apollolake/Makefile.inc
+++ b/src/soc/intel/apollolake/Makefile.inc
@@ -7,6 +7,7 @@ subdirs-y += ../../../cpu/x86/mtrr
subdirs-y += ../../../cpu/x86/smm
subdirs-y += ../../../cpu/x86/tsc
subdirs-y += ../../../cpu/x86/cache
+subdirs-y += ../common/block/*
bootblock-y += bootblock/bootblock.c
bootblock-y += bootblock/bootblock.c
@@ -82,7 +83,6 @@ ramstage-y += reset.c
ramstage-y += smi.c
ramstage-y += sram.c
ramstage-y += spi.c
-ramstage-y += xhci.c
postcar-y += flash_ctrlr.c
postcar-y += memmap.c
diff --git a/src/soc/intel/apollolake/xhci.c b/src/soc/intel/apollolake/xhci.c
deleted file mode 100644
index 7b3cb46..0000000
--- a/src/soc/intel/apollolake/xhci.c
+++ /dev/null
@@ -1,105 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright 2016 Google Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#include <arch/io.h>
-#include <console/console.h>
-#include <device/device.h>
-#include <device/pci.h>
-#include <device/pci_ids.h>
-#include <soc/pci_devs.h>
-#include <soc/pci_ids.h>
-#include <timer.h>
-
-#define DUAL_ROLE_CFG0 0x80d8
-# define DRD_CONFIG_MASK (0x3 << 0)
-# define DRD_CONFIG_DYNAMIC (0x0 << 0)
-# define DRD_CONFIG_HOST (0x1 << 0)
-# define DRD_CONFIG_DEVICE (0x2 << 0)
-# define SW_VBUS_VALID_MASK (1 << 24)
-# define SW_VBUS_DEASSERT_VALID (0 << 24)
-# define SW_VBUS_ASSERT_VALID (1 << 24)
-# define SW_IDPIN_EN_MASK (1 << 21)
-# define SW_IDPIN_DIS (0 << 21)
-# define SW_IDPIN_EN (1 << 21)
-# define SW_IDPIN_MASK (1 << 20)
-# define SW_IDPIN_HOST (0 << 20)
-# define SW_IDPIN_DEVICE (1 << 20)
-#define DUAL_ROLE_CFG1 0x80dc
-# define DRD_MODE_MASK (1 << 29)
-# define DRD_MODE_DEVICE (0 << 29)
-# define DRD_MODE_HOST (1 << 29)
-
-static void configure_host_mode_port0(struct device *dev)
-{
- uint32_t *cfg0;
- uint32_t *cfg1;
- const struct resource *res;
- uint32_t reg;
- struct device *xdci_dev = XDCI_DEV;
- struct stopwatch sw;
-
- /*
- * Only default to host mode if the xdci device is present and
- * enabled. If it's disabled assume the switch was already done
- * in FSP.
- */
- if (xdci_dev == NULL || !xdci_dev->enabled)
- return;
-
- printk(BIOS_INFO, "Putting port 0 into host mode.\n");
-
- res = find_resource(dev, PCI_BASE_ADDRESS_0);
-
- cfg0 = (void *)(uintptr_t)(res->base + DUAL_ROLE_CFG0);
- cfg1 = (void *)(uintptr_t)(res->base + DUAL_ROLE_CFG1);
-
- reg = read32(cfg0);
- reg &= ~(DRD_CONFIG_MASK | SW_IDPIN_EN_MASK | SW_IDPIN_MASK);
- reg &= ~(SW_VBUS_VALID_MASK);
- reg |= DRD_CONFIG_DYNAMIC | SW_IDPIN_EN | SW_IDPIN_HOST;
- reg |= SW_VBUS_DEASSERT_VALID;
- write32(cfg0, reg);
-
- stopwatch_init_msecs_expire(&sw, 10);
-
- /* Wait for the host mode status bit. */
- while ((read32(cfg1) & DRD_MODE_MASK) != DRD_MODE_HOST) {
- if (stopwatch_expired(&sw)) {
- printk(BIOS_INFO, "Timed out waiting for host mode.\n");
- break;
- }
- }
-
- printk(BIOS_INFO, "XHCI port 0 host switch over took %lu ms\n",
- stopwatch_duration_msecs(&sw));
-}
-
-static void xhci_init(struct device *dev)
-{
- configure_host_mode_port0(dev);
-}
-
-static const struct device_operations device_ops = {
- .read_resources = pci_dev_read_resources,
- .set_resources = pci_dev_set_resources,
- .enable_resources = pci_dev_enable_resources,
- .init = xhci_init,
-};
-
-static const struct pci_driver pmc __pci_driver = {
- .ops = &device_ops,
- .vendor = PCI_VENDOR_ID_INTEL,
- .device = PCI_DEVICE_ID_APOLLOLAKE_XHCI,
-};
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