[coreboot-gerrit] New patch to review for coreboot: mainboard/google/reef: Increase PL1 sampling period

[Sumeet R Pawnikar (sumeet.r.pawnikar@intel.com)]

Sumeet R Pawnikar (sumeet.r.pawnikar at intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/18317

-gerrit

commit 518e565ecb25b333790a3b94b2a6043271c8900e
Author: Sumeet Pawnikar <sumeet.r.pawnikar at intel.com>
Date:   Fri Feb 10 11:13:36 2017 +0530

    mainboard/google/reef: Increase PL1 sampling period
    
    Increased PL1 sampling period value to 15 seconds for TSR1 sensor.
    
    BUG=chrome-os-partner:60038
    BRANCH=reef
    TEST=Built and tested on electro system
    
    Change-Id: I5cdebb08e00f0f28b88f1c6b2b1cafaeb8cdb453
    Signed-off-by: Sumeet Pawnikar <sumeet.r.pawnikar at intel.com>
---
 .../google/reef/variants/baseboard/include/baseboard/acpi/dptf.asl      | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/mainboard/google/reef/variants/baseboard/include/baseboard/acpi/dptf.asl b/src/mainboard/google/reef/variants/baseboard/include/baseboard/acpi/dptf.asl
index dba182e..0addae8 100644
--- a/src/mainboard/google/reef/variants/baseboard/include/baseboard/acpi/dptf.asl
+++ b/src/mainboard/google/reef/variants/baseboard/include/baseboard/acpi/dptf.asl
@@ -61,7 +61,7 @@ Name (DTRT, Package () {
 #endif
 
 	/* CPU Effect on Temp Sensor 1 */
-	Package () { \_SB.PCI0.TCPU, \_SB.DPTF.TSR1, 100, 80, 0, 0, 0, 0 },
+	Package () { \_SB.PCI0.TCPU, \_SB.DPTF.TSR1, 100, 150, 0, 0, 0, 0 },
 
 	/* CPU Effect on Temp Sensor 2 */
 	Package () { \_SB.PCI0.TCPU, \_SB.DPTF.TSR2, 100, 1200, 0, 0, 0, 0 },