[coreboot-gerrit] New patch to review for coreboot: google/rambi: add explicit pull-down for ram-id

Matt DeVillier (matt.devillier@gmail.com) gerrit at coreboot.org
Wed Feb 8 21:23:18 CET 2017


Matt DeVillier (matt.devillier at gmail.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/18309

-gerrit

commit 4c58e0b79e4ea0b673265a022b1b2f1f40b59b40
Author: Matt DeVillier <matt.devillier at gmail.com>
Date:   Tue Feb 7 22:07:56 2017 -0600

    google/rambi: add explicit pull-down for ram-id
    
    Some variants need the internal pull resistor on GPIO_SSUS_40
    set explicitly to pull down rather than disabling the pull,
    in order for the ram-id to be read correctly via GPIO.
    
    Correct this by adding a function to enable and set the internal pull
    (taken from Chromium) and define its use as needed in the board's
    variant.h.
    
    Test: boot 4GB Candy board and observe correct RAM amount detected
    
    Change-Id: I8823c27385f4422184b5afa57f6048f7ff2a25ab
    Signed-off-by: Matt DeVillier <matt.devillier at gmail.com>
---
 src/mainboard/google/rambi/romstage.c                              | 4 +++-
 .../google/rambi/variants/candy/include/variant/variant.h          | 1 +
 .../google/rambi/variants/glimmer/include/variant/variant.h        | 1 +
 .../google/rambi/variants/gnawty/include/variant/variant.h         | 2 ++
 src/soc/intel/baytrail/include/soc/gpio.h                          | 7 +++++++
 5 files changed, 14 insertions(+), 1 deletion(-)

diff --git a/src/mainboard/google/rambi/romstage.c b/src/mainboard/google/rambi/romstage.c
index d8ba001..1c545c1 100644
--- a/src/mainboard/google/rambi/romstage.c
+++ b/src/mainboard/google/rambi/romstage.c
@@ -32,7 +32,9 @@ static void *get_spd_pointer(char *spd_file_content, int total_spds, int *dual)
 	ssus_disable_internal_pull(GPIO_SSUS_37_PAD);
 	ssus_disable_internal_pull(GPIO_SSUS_38_PAD);
 	ssus_disable_internal_pull(GPIO_SSUS_39_PAD);
-#ifdef GPIO_SSUS_40_PAD
+#ifdef GPIO_SSUS_40_PAD_USE_PULLDOWN
+	ssus_enable_internal_pull(GPIO_SSUS_40_PAD, PAD_PULL_DOWN | PAD_PU_20K);
+#elif GPIO_SSUS_40_PAD
 	ssus_disable_internal_pull(GPIO_SSUS_40_PAD);
 #endif
 	ram_id |= (ssus_get_gpio(GPIO_SSUS_37_PAD) << 0);
diff --git a/src/mainboard/google/rambi/variants/candy/include/variant/variant.h b/src/mainboard/google/rambi/variants/candy/include/variant/variant.h
index 0c58cee..fe4c475 100644
--- a/src/mainboard/google/rambi/variants/candy/include/variant/variant.h
+++ b/src/mainboard/google/rambi/variants/candy/include/variant/variant.h
@@ -38,5 +38,6 @@ static const uint32_t dual_channel_config =
 #define GPIO_SSUS_38_PAD 50
 #define GPIO_SSUS_39_PAD 58
 #define GPIO_SSUS_40_PAD 52
+#define GPIO_SSUS_40_PAD_USE_PULLDOWN
 
 #endif
diff --git a/src/mainboard/google/rambi/variants/glimmer/include/variant/variant.h b/src/mainboard/google/rambi/variants/glimmer/include/variant/variant.h
index 0ea42c5..59d5ee1 100644
--- a/src/mainboard/google/rambi/variants/glimmer/include/variant/variant.h
+++ b/src/mainboard/google/rambi/variants/glimmer/include/variant/variant.h
@@ -38,5 +38,6 @@ static const uint32_t dual_channel_config =
 #define GPIO_SSUS_38_PAD 50
 #define GPIO_SSUS_39_PAD 58
 #define GPIO_SSUS_40_PAD 52
+#define GPIO_SSUS_40_PAD_USE_PULLDOWN
 
 #endif
diff --git a/src/mainboard/google/rambi/variants/gnawty/include/variant/variant.h b/src/mainboard/google/rambi/variants/gnawty/include/variant/variant.h
index 9bac7bc..bd79c98 100644
--- a/src/mainboard/google/rambi/variants/gnawty/include/variant/variant.h
+++ b/src/mainboard/google/rambi/variants/gnawty/include/variant/variant.h
@@ -33,5 +33,7 @@ static const uint32_t dual_channel_config =
 #define GPIO_SSUS_37_PAD 57
 #define GPIO_SSUS_38_PAD 50
 #define GPIO_SSUS_39_PAD 58
+#define GPIO_SSUS_40_PAD 52
+#define GPIO_SSUS_40_PAD_USE_PULLDOWN
 
 #endif
diff --git a/src/soc/intel/baytrail/include/soc/gpio.h b/src/soc/intel/baytrail/include/soc/gpio.h
index 3757eb0..9c6b7fd 100644
--- a/src/soc/intel/baytrail/include/soc/gpio.h
+++ b/src/soc/intel/baytrail/include/soc/gpio.h
@@ -454,4 +454,11 @@ static inline void ssus_disable_internal_pull(int pad)
 	write32(ssus_pconf0(pad), read32(ssus_pconf0(pad)) & pull_mask);
 }
 
+static inline void ssus_enable_internal_pull(int pad, int mask)
+{
+	const int pull_mask = ~(0xf << 7);
+	write32(ssus_pconf0(pad),
+		(read32(ssus_pconf0(pad)) & pull_mask) | mask);
+}
+
 #endif /* _BAYTRAIL_GPIO_H_ */



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