[coreboot-gerrit] New patch to review for coreboot: google/eve: Set GPIO GPP_D22 high

[Duncan Laurie (dlaurie@chromium.org)]

Duncan Laurie (dlaurie at chromium.org) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/18281

-gerrit

commit 555627a8fcc22ff5bec8b16aa45307419ebb4d41
Author: Duncan Laurie <dlaurie at chromium.org>
Date:   Tue Jan 31 15:09:02 2017 -0800

    google/eve: Set GPIO GPP_D22 high
    
    GPIO GPP_D22 controls the I2S buffer for isolating the I2S signals
    when doing GPIO-driven I2S.  This needs to be high by default so
    the DSP can drive these signals, instead of low where it is enabled
    for GPIO-driven I2S and the DSP cannot drive these signals.
    
    BUG=chrome-os-partner:58666
    TEST=play test sound in OS over internal speaker
    
    Change-Id: I49935e659bf67225d3f5db1b06acc2cd046dcd74
    Signed-off-by: Duncan Laurie <dlaurie at chromium.org>
---
 src/mainboard/google/eve/gpio.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/mainboard/google/eve/gpio.h b/src/mainboard/google/eve/gpio.h
index e8d42f0..f5b09d9 100644
--- a/src/mainboard/google/eve/gpio.h
+++ b/src/mainboard/google/eve/gpio.h
@@ -142,7 +142,7 @@ static const struct pad_config gpio_table[] = {
 /* DMIC_CLK0 */		PAD_CFG_NF(GPP_D19, NONE, DEEP, NF1),
 /* DMIC_DATA0 */	PAD_CFG_NF(GPP_D20, NONE, DEEP, NF1),
 /* SPI1_IO2 */		PAD_CFG_NC(GPP_D21),
-/* SPI1_IO3 */		PAD_CFG_GPO(GPP_D22, 0, DEEP), /* I2S2 BUFFER */
+/* SPI1_IO3 */		PAD_CFG_GPO(GPP_D22, 1, DEEP), /* I2S2 BUFFER */
 /* I2S_MCLK */		PAD_CFG_NF(GPP_D23, NONE, DEEP, NF1),
 
 /* SATAXPCI0 */		PAD_CFG_GPI_APIC_INVERT(GPP_E0, NONE, PLTRST), /* TPM_INT_L */