[coreboot-gerrit] Change in coreboot[master]: intel/common/smbus: Add support for reading SPD by block

[Youness Alaoui (Code Review)]

Youness Alaoui has uploaded a new patch set (#2). ( https://review.coreboot.org/22967 )

Change subject: intel/common/smbus: Add support for reading SPD by block
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intel/common/smbus: Add support for reading SPD by block

This change adds support for reading from the SMBus using the Block Read
command, which speeds up the transfer of data significantly (~75%) when
compared to Byte Read or Word Read commands.

There are two methods for reading block data, either with the E32B option
or without it. When enabling E32B, a 32 Byte array is used to return
up to 32 bytes of block data. Otherwise, each byte needs to be read
from a single byte register whenever it becomes available.

When testing on Purism Librem 13 v2, the E32B option did not work, as
it would return mangled data every time and at the wrong offsets from
what was requested. Doing a byte-by-byte read works correctly however.

Unfortunately, there is a quirk in the SMBus controller where the first
byte of data is returned in the DAT0 register and the rest is returned
in the HBD register (as expected). The datasheet says that the DAT0
register should instead contain the number of bytes being returned.

This change adds three new options, one for using the Block Read to read
the SPD data, one to specify whether to use the E32B feature or not, and
one for the DAT0 quirk mentioned above.

Note that the E32B implementation was not tested on compatible hardware
but it was written to follow the specification and should work if the
hardware supports E32B and has no additional quirks.

Speed improvements :
- With Byte Read : 218 ms to dump DDR4 SPD data (512 bytes)
- With Word Read : 134 ms to dump DDR4 SPD data (512 bytes)
- With Block Read : 62 ms to dump DDR4 SPD data (512 bytes)
- With Byte Read : 108 ms to dump DDR3 SPD data (256 bytes)
- With Word Read :  66 ms to dump DDR3 SPD data (256 bytes)
- With Block Read : 34 ms to dump DDR3 SPD data (256 bytes)

Tested on Purism Librem 13 v2 and Librem 15 v3 with the DAT0
Quirk option enabled.

Change-Id: I14882b646e7c0fa96cf38a698562cc20bbd41095
Signed-off-by: Youness Alaoui <youness.alaoui at puri.sm>
---
M src/Kconfig
M src/include/device/early_smbus.h
M src/lib/spd_bin.c
M src/soc/intel/common/block/smbus/smbus_early.c
M src/soc/intel/common/block/smbus/smbuslib.c
M src/soc/intel/common/block/smbus/smbuslib.h
6 files changed, 191 insertions(+), 8 deletions(-)


  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/67/22967/2
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newpatchset
Gerrit-Change-Id: I14882b646e7c0fa96cf38a698562cc20bbd41095
Gerrit-Change-Number: 22967
Gerrit-PatchSet: 2
Gerrit-Owner: Youness Alaoui <snifikino at gmail.com>
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