[coreboot-gerrit] Change in coreboot[master]: [wip]soc/intel/cannonlake: Correct PMC/GPIO routing information

Lijian Zhao (Code Review) gerrit at coreboot.org
Fri Dec 15 23:17:17 CET 2017


Lijian Zhao has posted comments on this change. ( https://review.coreboot.org/22908 )

Change subject: [wip]soc/intel/cannonlake: Correct PMC/GPIO routing information
......................................................................


Patch Set 2:

I think the following changes may be added here as well 
1. add pmc_gpio_gpe programming in bootblock
2. add pmc_gpp define into chip.h
3. increast bootblock size


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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: comment
Gerrit-Change-Id: I1edb83edabc72e8a762b129cf51dcd936cd37ddf
Gerrit-Change-Number: 22908
Gerrit-PatchSet: 2
Gerrit-Owner: Lijian Zhao <lijian.zhao at intel.com>
Gerrit-Reviewer: Bora Guvendik <bora.guvendik at intel.com>
Gerrit-Reviewer: Caveh Jalali <caveh at google.com>
Gerrit-Reviewer: Lijian Zhao <lijian.zhao at intel.com>
Gerrit-Reviewer: Nick Vaccaro <nvaccaro at google.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply at coreboot.org>
Gerrit-Comment-Date: Fri, 15 Dec 2017 22:17:17 +0000
Gerrit-HasComments: No
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