[coreboot-gerrit] Change in coreboot[master]: soc/amd: Move stoneyridge features out of agesawrapper
Marshall Dawson (Code Review)
gerrit at coreboot.org
Fri Dec 15 01:38:08 CET 2017
Marshall Dawson has uploaded this change for review. ( https://review.coreboot.org/22886
Change subject: soc/amd: Move stoneyridge features out of agesawrapper
......................................................................
soc/amd: Move stoneyridge features out of agesawrapper
The AGESA wrapper should not use and CONFIG_STONEY* values, nor should
it make any assumptions about the capabilities of a particular device.
Move these into stoneyridge northbridge and southbridge files.
BUG=b:70670425
TEST=Build and run Kahlee
Change-Id: I706edbb6a048b64389ba3077d5df0fe6155070b3
Signed-off-by: Marshall Dawson <marshalldawson3rd at gmail.com>
---
M src/soc/amd/common/block/include/amdblocks/agesawrapper.h
M src/soc/amd/common/block/pi/agesawrapper.c
M src/soc/amd/stoneyridge/northbridge.c
M src/soc/amd/stoneyridge/southbridge.c
4 files changed, 59 insertions(+), 20 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/86/22886/1
diff --git a/src/soc/amd/common/block/include/amdblocks/agesawrapper.h b/src/soc/amd/common/block/include/amdblocks/agesawrapper.h
index d16e9ff..70e6830 100644
--- a/src/soc/amd/common/block/include/amdblocks/agesawrapper.h
+++ b/src/soc/amd/common/block/include/amdblocks/agesawrapper.h
@@ -54,7 +54,12 @@
VOID amd_initcpuio(void);
const void *agesawrapper_locate_module(const CHAR8 name[8]);
+void SetFchResetParams(FCH_RESET_INTERFACE *params);
void OemPostParams(AMD_POST_PARAMS *PostParams);
void SetMemParams(AMD_POST_PARAMS *PostParams);
+void SetFchEnvParams(FCH_INTERFACE *params);
+void SetNbEnvParams(GNB_ENV_CONFIGURATION *params);
+void SetFchMidParams(FCH_INTERFACE *params);
+void SetNbMidParams(GNB_MID_CONFIGURATION *params);
#endif /* __AGESAWRAPPER_H__ */
diff --git a/src/soc/amd/common/block/pi/agesawrapper.c b/src/soc/amd/common/block/pi/agesawrapper.c
index c6ff89e..4a3e527 100644
--- a/src/soc/amd/common/block/pi/agesawrapper.c
+++ b/src/soc/amd/common/block/pi/agesawrapper.c
@@ -23,8 +23,13 @@
#include <string.h>
#include <timestamp.h>
+void __attribute__((weak)) SetFchResetParams(FCH_RESET_INTERFACE *params) {}
void __attribute__((weak)) SetMemParams(AMD_POST_PARAMS *PostParams) {}
void __attribute__((weak)) OemPostParams(AMD_POST_PARAMS *PostParams) {}
+void __attribute__((weak)) SetFchEnvParams(FCH_INTERFACE *params) {}
+void __attribute__((weak)) SetNbEnvParams(GNB_ENV_CONFIGURATION *params) {}
+void __attribute__((weak)) SetFchMidParams(FCH_INTERFACE *params) {}
+void __attribute__((weak)) SetNbMidParams(GNB_MID_CONFIGURATION *params) {}
/* ACPI table pointers returned by AmdInitLate */
static void *DmiTable CAR_GLOBAL;
@@ -84,10 +89,7 @@
AmdParamStruct.StdHeader.ImageBasePtr = 0;
AmdCreateStruct (&AmdParamStruct);
- AmdResetParams.FchInterface.Xhci0Enable = IS_ENABLED(CONFIG_STONEYRIDGE_XHCI_ENABLE);
-
- AmdResetParams.FchInterface.SataEnable = !((CONFIG_STONEYRIDGE_SATA_MODE == 0) || (CONFIG_STONEYRIDGE_SATA_MODE == 3));
- AmdResetParams.FchInterface.IdeEnable = (CONFIG_STONEYRIDGE_SATA_MODE == 0) || (CONFIG_STONEYRIDGE_SATA_MODE == 3);
+ SetFchResetParams(&AmdResetParams.FchInterface);
timestamp_add_now(TS_AGESA_INIT_RESET_START);
status = AmdInitReset(&AmdResetParams);
@@ -218,14 +220,10 @@
AmdParamStruct.StdHeader.Func = 0;
AmdParamStruct.StdHeader.ImageBasePtr = 0;
status = AmdCreateStruct (&AmdParamStruct);
- EnvParam = (AMD_ENV_PARAMS *)AmdParamStruct.NewStructPtr;
- EnvParam->FchInterface.AzaliaController = AzEnable;
- EnvParam->FchInterface.SataClass = CONFIG_STONEYRIDGE_SATA_MODE;
- EnvParam->FchInterface.SataEnable = !((CONFIG_STONEYRIDGE_SATA_MODE == 0) || (CONFIG_STONEYRIDGE_SATA_MODE == 3));
- EnvParam->FchInterface.IdeEnable = (CONFIG_STONEYRIDGE_SATA_MODE == 0) || (CONFIG_STONEYRIDGE_SATA_MODE == 3);
- EnvParam->FchInterface.SataIdeMode = (CONFIG_STONEYRIDGE_SATA_MODE == 3);
- EnvParam->GnbEnvConfiguration.IommuSupport = FALSE;
+ EnvParam = (AMD_ENV_PARAMS *)AmdParamStruct.NewStructPtr;
+ SetFchEnvParams(&EnvParam->FchInterface);
+ SetNbEnvParams(&EnvParam->GnbEnvConfiguration);
timestamp_add_now(TS_AGESA_INIT_ENV_START);
status = AmdInitEnv (EnvParam);
@@ -286,16 +284,10 @@
AmdParamStruct.StdHeader.ImageBasePtr = 0;
AmdCreateStruct (&AmdParamStruct);
+
MidParam = (AMD_MID_PARAMS *)AmdParamStruct.NewStructPtr;
-
- MidParam->GnbMidConfiguration.iGpuVgaMode = 0;/* 0 iGpuVgaAdapter, 1 iGpuVgaNonAdapter; */
- MidParam->GnbMidConfiguration.GnbIoapicAddress = 0xFEC20000;
-
- MidParam->FchInterface.AzaliaController = AzEnable;
- MidParam->FchInterface.SataClass = CONFIG_STONEYRIDGE_SATA_MODE;
- MidParam->FchInterface.SataEnable = !((CONFIG_STONEYRIDGE_SATA_MODE == 0) || (CONFIG_STONEYRIDGE_SATA_MODE == 3));
- MidParam->FchInterface.IdeEnable = (CONFIG_STONEYRIDGE_SATA_MODE == 0) || (CONFIG_STONEYRIDGE_SATA_MODE == 3);
- MidParam->FchInterface.SataIdeMode = (CONFIG_STONEYRIDGE_SATA_MODE == 3);
+ SetFchMidParams(&MidParam->FchInterface);
+ SetNbMidParams(&MidParam->GnbMidConfiguration);
timestamp_add_now(TS_AGESA_INIT_MID_START);
status = AmdInitMid ((AMD_MID_PARAMS *)AmdParamStruct.NewStructPtr);
diff --git a/src/soc/amd/stoneyridge/northbridge.c b/src/soc/amd/stoneyridge/northbridge.c
index 27b5388..aa33118 100644
--- a/src/soc/amd/stoneyridge/northbridge.c
+++ b/src/soc/amd/stoneyridge/northbridge.c
@@ -30,9 +30,11 @@
#include <device/pci_ids.h>
#include <amdblocks/agesawrapper.h>
#include <amdblocks/agesawrapper_call.h>
+#include <agesa_headers.h>
#include <soc/northbridge.h>
#include <soc/southbridge.h>
#include <soc/pci_devs.h>
+#include <soc/iomap.h>
#include <stdint.h>
#include <stdlib.h>
#include <string.h>
@@ -556,3 +558,15 @@
return new_vendev;
}
+
+void SetNbEnvParams(GNB_ENV_CONFIGURATION *params)
+{
+ params->IommuSupport = FALSE;
+}
+
+void SetNbMidParams(GNB_MID_CONFIGURATION *params)
+{
+ /* 0=Primary and decode all VGA resources, 1=Secondary - decode none */
+ params->iGpuVgaMode = 0;
+ params->GnbIoapicAddress = IO_APIC2_ADDR;
+}
diff --git a/src/soc/amd/stoneyridge/southbridge.c b/src/soc/amd/stoneyridge/southbridge.c
index a9081f8..ea17a39 100644
--- a/src/soc/amd/stoneyridge/southbridge.c
+++ b/src/soc/amd/stoneyridge/southbridge.c
@@ -31,6 +31,34 @@
#include <fchec.h>
#include <delay.h>
#include <soc/pci_devs.h>
+#include <agesa_headers.h>
+
+static int is_sata_config(void)
+{
+ return !((CONFIG_STONEYRIDGE_SATA_MODE == SataNativeIde)
+ || (CONFIG_STONEYRIDGE_SATA_MODE == SataLegacyIde));
+}
+
+void SetFchResetParams(FCH_RESET_INTERFACE *params)
+{
+ params->Xhci0Enable = IS_ENABLED(CONFIG_STONEYRIDGE_XHCI_ENABLE);
+ params->SataEnable = is_sata_config();
+ params->IdeEnable = !is_sata_config();
+}
+
+void SetFchEnvParams(FCH_INTERFACE *params)
+{
+ params->AzaliaController = AzEnable;
+ params->SataClass = CONFIG_STONEYRIDGE_SATA_MODE;
+ params->SataEnable = is_sata_config();
+ params->IdeEnable = !is_sata_config();
+ params->SataIdeMode = (CONFIG_STONEYRIDGE_SATA_MODE == SataLegacyIde);
+}
+
+void SetFchMidParams(FCH_INTERFACE *params)
+{
+ SetFchEnvParams(params);
+}
/*
* Table of APIC register index and associated IRQ name. Using IDX_XXX_NAME
--
To view, visit https://review.coreboot.org/22886
To unsubscribe, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I706edbb6a048b64389ba3077d5df0fe6155070b3
Gerrit-Change-Number: 22886
Gerrit-PatchSet: 1
Gerrit-Owner: Marshall Dawson <marshalldawson3rd at gmail.com>
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://mail.coreboot.org/pipermail/coreboot-gerrit/attachments/20171215/aea0fb94/attachment-0001.html>
More information about the coreboot-gerrit
mailing list