[coreboot-gerrit] Change in coreboot[master]: [WIP/NOTFORMERGE]sb/intel/i82801ix: Automatically generate pirq ACPI
Arthur Heymans (Code Review)
gerrit at coreboot.org
Sun Dec 10 12:59:03 CET 2017
Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/22802
Change subject: [WIP/NOTFORMERGE]sb/intel/i82801ix: Automatically generate pirq ACPI
......................................................................
[WIP/NOTFORMERGE]sb/intel/i82801ix: Automatically generate pirq ACPI
Does not work at all...
Change-Id: Iee38eaee8d443286cdcecc4f9df0b713639da669
Signed-off-by: Arthur Heymans <arthur at aheymans.xyz>
---
M src/southbridge/intel/i82801ix/lpc.c
1 file changed, 45 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/02/22802/1
diff --git a/src/southbridge/intel/i82801ix/lpc.c b/src/southbridge/intel/i82801ix/lpc.c
index bc45b9d..65d6dae 100644
--- a/src/southbridge/intel/i82801ix/lpc.c
+++ b/src/southbridge/intel/i82801ix/lpc.c
@@ -562,8 +562,53 @@
{
device_t dev = dev_find_slot(0, PCI_DEVFN(0x1f,0));
config_t *chip = dev->chip_info;
+ device_t irq_dev;
+ u8 int_pin;
+
+ const char *link_list[4] = {"\\_SB.PCI0.LPCB.LNKA",
+ "\\_SB.PCI0.LPCB.LNKB",
+ "\\_SB.PCI0.LPCB.LNKC",
+ "\\_SB.PCI0.LPCB.LNKD"};
intel_acpi_pcie_hotplug_generator(chip->pcie_hotplug_map, 8);
+
+ acpigen_write_scope("\\_SB");
+ acpigen_write_device("PCI0");
+ acpigen_write_method("_PRT", 0);
+ acpigen_write_if();
+ acpigen_emit_namestring("PICM");
+ acpigen_emit_byte(RETURN_OP);
+ acpigen_emit_byte(PACKAGE_OP);
+ for (irq_dev = all_devices; irq_dev; irq_dev = irq_dev->next) {
+ int_pin = pci_read_config8(irq_dev, PCI_INTERRUPT_PIN);
+ acpigen_write_package(4);
+ acpigen_emit_dword((((irq_dev->bus->secondary >> 11) & 0x1f) << 16) & 0xffff);
+ acpigen_emit_dword(int_pin);
+ acpigen_emit_dword(0);
+ acpigen_emit_dword(16 + (int_pin - 1));
+ acpigen_pop_len();
+ }
+ acpigen_pop_len(); /* package */
+ acpigen_pop_len(); /* return PICM */
+ acpigen_pop_len(); /* if PICM */
+ acpigen_write_else();
+ acpigen_emit_byte(RETURN_OP);
+ acpigen_emit_byte(PACKAGE_OP);
+ for (irq_dev = all_devices; irq_dev; irq_dev = irq_dev->next) {
+ int_pin = pci_read_config8(irq_dev, PCI_INTERRUPT_PIN);
+ acpigen_write_package(4);
+ acpigen_emit_dword((((irq_dev->bus->secondary >> 11) & 0x1f) << 16) & 0xffff);
+ acpigen_emit_dword(int_pin);
+ acpigen_write_string(link_list[int_pin - 1]);
+ acpigen_emit_dword(0);
+ acpigen_pop_len();
+ }
+ acpigen_pop_len(); /* package */
+ acpigen_pop_len(); /* return else PICM */
+ acpigen_pop_len(); /* else PICM*/
+ acpigen_pop_len(); /* _PRT */
+ acpigen_pop_len(); /* PCI0 */
+ acpigen_pop_len(); /* \_SB */
}
static struct pci_operations pci_ops = {
--
To view, visit https://review.coreboot.org/22802
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: Iee38eaee8d443286cdcecc4f9df0b713639da669
Gerrit-Change-Number: 22802
Gerrit-PatchSet: 1
Gerrit-Owner: Arthur Heymans <arthur at aheymans.xyz>
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