[coreboot-gerrit] Change in coreboot[master]: mb/google/fizz: Enable mbox command for ISL VR c-state issue
Rizwan Qureshi (Code Review)
gerrit at coreboot.org
Wed Dec 6 21:53:32 CET 2017
Rizwan Qureshi has uploaded this change for review. ( https://review.coreboot.org/22763
Change subject: mb/google/fizz: Enable mbox command for ISL VR c-state issue
......................................................................
mb/google/fizz: Enable mbox command for ISL VR c-state issue
There is a potential IMVP8 issue for KBL that affects Intersil VRs
Fizz is using one of the affected parts. The fix is to use an updated
microcode and also send a mailbox box command from FSP.
BUG=b:65499724
BRANCH=None
TEST=Build and boot Fizz
Change-Id: Iebfda02df88ea0d2aaf79e8449b95c0eb2165c6b
Signed-off-by: Rizwan Qureshi <rizwan.qureshi at intel.com>
---
M src/mainboard/google/fizz/devicetree.cb
1 file changed, 1 insertion(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/63/22763/1
diff --git a/src/mainboard/google/fizz/devicetree.cb b/src/mainboard/google/fizz/devicetree.cb
index 1590252..c81110c 100644
--- a/src/mainboard/google/fizz/devicetree.cb
+++ b/src/mainboard/google/fizz/devicetree.cb
@@ -84,6 +84,7 @@
register "PmConfigSlpAMinAssert" = "3" # 2s
register "PmTimerDisabled" = "1"
register "SendVrMbxCmd" = "1" # IMVP8 workaround
+ register "IslVrCmd" = "2" # Intersil VR issue WA
register "pirqa_routing" = "PCH_IRQ11"
register "pirqb_routing" = "PCH_IRQ10"
--
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: Iebfda02df88ea0d2aaf79e8449b95c0eb2165c6b
Gerrit-Change-Number: 22763
Gerrit-PatchSet: 1
Gerrit-Owner: Rizwan Qureshi <rizwan.qureshi at intel.com>
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