[coreboot-gerrit] Change in coreboot[master]: soc/intel/skylake: Use SA library to get smm region information
Subrata Banik (Code Review)
gerrit at coreboot.org
Wed Aug 30 15:06:42 CEST 2017
Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/21290
Change subject: soc/intel/skylake: Use SA library to get smm region information
......................................................................
soc/intel/skylake: Use SA library to get smm region information
This patch uses system agent common library to
know tseg region start and size. Unable to remove smm_region()
function from soc code as SMM common library
is not yet available for skylake use.
BRANCH=none
BUG=b:63974384
TEST=Build and boot eve successfully.
Change-Id: If98b65805753db2c30d6fea29e401a17cef39799
Signed-off-by: Subrata Banik <subrata.banik at intel.com>
---
M src/soc/intel/skylake/memmap.c
1 file changed, 7 insertions(+), 23 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/90/21290/1
diff --git a/src/soc/intel/skylake/memmap.c b/src/soc/intel/skylake/memmap.c
index 1ccaf1d..229afa7 100644
--- a/src/soc/intel/skylake/memmap.c
+++ b/src/soc/intel/skylake/memmap.c
@@ -38,27 +38,10 @@
return 8*MiB;
}
-/* Returns base of requested region encoded in the system agent. */
-static inline uintptr_t system_agent_region_base(size_t reg)
-{
- /* All regions concerned for have 1 MiB alignment. */
- return ALIGN_DOWN(pci_read_config32(SA_DEV_ROOT, reg), 1*MiB);
-}
-
-static inline uintptr_t smm_region_start(void)
-{
- return system_agent_region_base(TSEG);
-}
-
-static inline size_t smm_region_size(void)
-{
- return system_agent_region_base(BGSM) - smm_region_start();
-}
-
void smm_region(void **start, size_t *size)
{
- *start = (void *)smm_region_start();
- *size = smm_region_size();
+ *start = (void *)sa_get_tseg_base();
+ *size = sa_get_tseg_size();
}
/*
@@ -76,11 +59,12 @@
{
uintptr_t sub_base;
size_t sub_size;
+ void *smm_base;
const size_t ied_size = CONFIG_IED_REGION_SIZE;
const size_t cache_size = CONFIG_SMM_RESERVED_SIZE;
- sub_base = smm_region_start();
- sub_size = smm_region_size();
+ smm_region(&smm_base, &sub_size);
+ sub_base = (uintptr_t)smm_base;
switch (sub) {
case SMM_SUBREGION_HANDLER:
@@ -170,7 +154,7 @@
dram_base -= sa_get_gsm_size();
}
/* Get TSEG size */
- dram_base -= smm_region_size();
+ dram_base -= sa_get_tseg_size();
/* Get DPR size */
if (IS_ENABLED(CONFIG_SA_ENABLE_DPR))
@@ -224,7 +208,7 @@
* PRMMR_BASE MSR. The system hangs if PRMRR_BASE MSR is read before
* PRMRR_MASK MSR lock bit is set.
*/
- if (smm_region_start() == 0)
+ if (sa_get_tseg_base() == 0)
return 0;
return calculate_dram_base();
--
To view, visit https://review.coreboot.org/21290
To unsubscribe, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: If98b65805753db2c30d6fea29e401a17cef39799
Gerrit-Change-Number: 21290
Gerrit-PatchSet: 1
Gerrit-Owner: Subrata Banik <subrata.banik at intel.com>
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