[coreboot-gerrit] Change in coreboot[master]: soc/intel/cannonlake: add *spi.c files to make
Nick Vaccaro (Code Review)
gerrit at coreboot.org
Wed Aug 30 05:03:57 CEST 2017
Nick Vaccaro has uploaded this change for review. ( https://review.coreboot.org/21284
Change subject: soc/intel/cannonlake: add *spi.c files to make
......................................................................
soc/intel/cannonlake: add *spi.c files to make
Adds spi.c and gspi.c to verstage.
Change-Id: I363d9aafa989c5a7a0b36ad9edf1c70a75604d28
Signed-off-by: Nick Vaccaro <nvaccaro at google.com>
---
M src/soc/intel/cannonlake/Makefile.inc
1 file changed, 3 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/84/21284/1
diff --git a/src/soc/intel/cannonlake/Makefile.inc b/src/soc/intel/cannonlake/Makefile.inc
index 9ce647d..dba04a8 100644
--- a/src/soc/intel/cannonlake/Makefile.inc
+++ b/src/soc/intel/cannonlake/Makefile.inc
@@ -44,6 +44,9 @@
postcar-y += spi.c
postcar-$(CONFIG_UART_DEBUG) += uart.c
+verstage-y += gspi.c
+verstage-y += spi.c
+
CPPFLAGS_common += -I$(src)/soc/intel/cannonlake/include/fsp20
CPPFLAGS_common += -I$(src)/vendorcode/intel/fsp/fsp2_0/cannonlake
--
To view, visit https://review.coreboot.org/21284
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I363d9aafa989c5a7a0b36ad9edf1c70a75604d28
Gerrit-Change-Number: 21284
Gerrit-PatchSet: 1
Gerrit-Owner: Nick Vaccaro <nvaccaro at google.com>
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