[coreboot-gerrit] Change in coreboot[master]: google/cyan: Use GpioInt for Keyboard IRQ

[Matt DeVillier (Code Review)]

Matt DeVillier has uploaded this change for review. ( https://review.coreboot.org/21177


Change subject: google/cyan: Use GpioInt for Keyboard IRQ
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google/cyan: Use GpioInt for Keyboard IRQ

Cherry-pick from Chromium commit a162348.

Remove the hard coded IRQ number for the keyboard interrupt.
IRQ number can change based upon the gpio bank index ordering.
Hence pass the gpio bank and index number so that kernel calculates
the IRQ number.

Original-Change-Id: Icfe5c3995007164bf617575b541758c18ee63a1d
Original-Signed-off-by: Jagadish Krishnamoorthy <jagadish.krishnamoorthy at intel.com>
Original-Reviewed-by: Duncan Laurie <dlaurie at chromium.org>

Change-Id: I81ff19e3060c533ee76023c7651f741294e9db30
Signed-off-by: Matt DeVillier <matt.devillier at gmail.com>
---
M src/mainboard/google/cyan/acpi/superio.asl
M src/mainboard/google/cyan/onboard.h
2 files changed, 4 insertions(+), 9 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/77/21177/1

diff --git a/src/mainboard/google/cyan/acpi/superio.asl b/src/mainboard/google/cyan/acpi/superio.asl
index 34ae348..f2a7fc0 100644
--- a/src/mainboard/google/cyan/acpi/superio.asl
+++ b/src/mainboard/google/cyan/acpi/superio.asl
@@ -23,8 +23,8 @@
 #define SIO_EC_ENABLE_PS2K       /* Enable PS/2 Keyboard */
 
 /* Override default IRQ settings */
-#define SIO_EC_PS2K_IRQ Interrupt(ResourceConsumer, Edge, ActiveLow){\
-                                                     BOARD_I8042_IRQ}
+#define SIO_EC_PS2K_IRQ GpioInt (Edge, ActiveLow, ExclusiveAndWake, PullNone,,\
+				 "\\_SB.GPNC") { BOARD_I8042_GPIO_INDEX }
 
 /* ACPI code for EC SuperIO functions */
 #include <ec/google/chromeec/acpi/superio.asl>
diff --git a/src/mainboard/google/cyan/onboard.h b/src/mainboard/google/cyan/onboard.h
index 1347d41..19b61df 100644
--- a/src/mainboard/google/cyan/onboard.h
+++ b/src/mainboard/google/cyan/onboard.h
@@ -30,16 +30,11 @@
  * GPSE_SIZE = 86
  */
 
-/*
- * gpio based irq for kbd, 17th index in North Bank
- * MAX_DIRECT_IRQ + GPSW_SIZE + 18
- */
-/* ToDO: change kbd irq to gpio bank index */
-#define BOARD_I8042_IRQ			182
 #define BOARD_TOUCH_IRQ			184
 #define BOARD_PRE_EVT_TOUCH_IRQ		156
 
-
+/* KBD: Gpio index in N bank */
+#define BOARD_I8042_GPIO_INDEX		17
 /* SCI: Gpio index in N bank */
 #define BOARD_SCI_GPIO_INDEX		15
 /* Trackpad: Gpio index in N bank */

-- 
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I81ff19e3060c533ee76023c7651f741294e9db30
Gerrit-Change-Number: 21177
Gerrit-PatchSet: 1
Gerrit-Owner: Matt DeVillier <matt.devillier at gmail.com>
Gerrit-Reviewer: Aaron Durbin <adurbin at chromium.org>
Gerrit-Reviewer: Jagadish Krishnamoorthy <jagadish.krishnamoorthy at intel.com>
Gerrit-Reviewer: Martin Roth <martinroth at google.com>
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