[coreboot-gerrit] Change in coreboot[master]: amd/stoneyridge: Change ACPI _PR.CPxx to _PR.Pxxx

[Marc Jones (Code Review)]

Marc Jones has uploaded this change for review. ( https://review.coreboot.org/21165


Change subject: amd/stoneyridge: Change ACPI _PR.CPxx to _PR.Pxxx
......................................................................

amd/stoneyridge: Change ACPI _PR.CPxx to _PR.Pxxx

This is a bug introduced by this commit:
stoneyridge: Fix CPU ASL \_PR table [commit I870f81]

The following error is found in dmesg

 ACPI Error: [\_PR_.P000] Namespace lookup failure, AE_NOT_FOUND...
 ACPI Exception: AE_NOT_FOUND, During name lookup/catalog...
 ACPI Exception: AE_NOT_FOUND, (SSDT:AGESA   ) while loading table...
 ACPI Error: 1 table load failures, 3 successful...
 ...
 acpi-cpufreq: overriding BIOS provided _PSD data

And, "ls -la /sys/devices/system/cpu/cpufreq/" doesn't work

The cause is that the Pstate SSDT table generated by AGESA expects CPU
variables \_PR.Pxxx, not \_PR.CPxx as generated by coreboot. Use an
AGESA specifc function to set Pxxx.

BRANCH=none
BUG=b:64885241
TEST= Check dmeg and ls -la /sys/devices/system/cpu/cpufreq/

Change-Id: I4929f9a1c39705c6df9d965c8d030f4d1f0b5e5f
Signed-off-by: Marc Jones <marcj303 at gmail.com>
---
M src/soc/amd/stoneyridge/acpi.c
1 file changed, 28 insertions(+), 4 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/65/21165/1

diff --git a/src/soc/amd/stoneyridge/acpi.c b/src/soc/amd/stoneyridge/acpi.c
index 9788a91..ed84d32 100644
--- a/src/soc/amd/stoneyridge/acpi.c
+++ b/src/soc/amd/stoneyridge/acpi.c
@@ -232,6 +232,30 @@
 	header->checksum = acpi_checksum((void *)fadt, sizeof(acpi_fadt_t));
 }
 
+
+/**
+ * The AMD AGESA SSDT Pstate table expects Processor devices labeled \_PR.Pxxx,
+ * not _PR.CPxx, as the generic write acpigen_write_processor() generates.
+ */
+static void agesa_acpigen_write_processor(u8 cpuindex, u32 pblock_addr,
+					   u8 pblock_len)
+{
+/*
+	Processor (\_PR.CPUcpuindex, cpuindex, pblock_addr, pblock_len)
+	{
+*/
+	char pscope[16];
+	acpigen_emit_ext_op(PROCESSOR_OP);
+	acpigen_write_len_f();
+
+	snprintf(pscope, sizeof(pscope),
+		 "\\_PR.P%03d", (unsigned int) cpuindex);
+	acpigen_emit_namestring(pscope);
+	acpigen_emit_byte(cpuindex);
+	acpigen_emit_dword(pblock_addr);
+	acpigen_emit_byte(pblock_len);
+}
+
 void generate_cpu_entries(device_t device)
 {
 	int cores, cpu, plen = 6;
@@ -245,15 +269,15 @@
 	printk(BIOS_DEBUG, "ACPI \\_PR report %d core(s)\n", cores);
 
 
-	/* Generate BSP \_PR.CPU0 */
-	acpigen_write_processor(0, pcontrol_blk, plen);
+	/* Generate BSP \_PR.P000 */
+	agesa_acpigen_write_processor(0, pcontrol_blk, plen);
 	acpigen_pop_len();
 
-	/* Generate AP \_PR.CPUx */
+	/* Generate AP \_PR.Pxxx */
 	pcontrol_blk = 0;
 	plen = 0;
 	for (cpu = 1; cpu < cores; cpu++) {
-		acpigen_write_processor(cpu, pcontrol_blk, 0);
+		agesa_acpigen_write_processor(cpu, pcontrol_blk, 0);
 		acpigen_pop_len();
 	}
 }

-- 
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I4929f9a1c39705c6df9d965c8d030f4d1f0b5e5f
Gerrit-Change-Number: 21165
Gerrit-PatchSet: 1
Gerrit-Owner: Marc Jones <marc at marcjonesconsulting.com>
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