[coreboot-gerrit] Change in coreboot[master]: soc/intel/common/block: Add functions to common CPU library code

[Shaunak Saha (Code Review)]

Shaunak Saha has uploaded this change for review. ( https://review.coreboot.org/21051


Change subject: soc/intel/common/block: Add functions to common CPU library code
......................................................................

soc/intel/common/block: Add functions to common CPU library code

This patch adds few helper functions in CPU common libraray code
which are mainly needed for ACPI module.

TEST= System boots properly and no regression observed.

Change-Id: Id34eb7e03069656238ca0cbdf6ce33f116e0e413
Signed-off-by: Shaunak Saha <shaunak.saha at intel.com>
---
M src/soc/intel/common/block/cpu/cpulib.c
M src/soc/intel/common/block/include/intelblocks/cpulib.h
2 files changed, 98 insertions(+), 1 deletion(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/51/21051/1

diff --git a/src/soc/intel/common/block/cpu/cpulib.c b/src/soc/intel/common/block/cpu/cpulib.c
index 5920512..97629b9 100644
--- a/src/soc/intel/common/block/cpu/cpulib.c
+++ b/src/soc/intel/common/block/cpu/cpulib.c
@@ -14,6 +14,7 @@
  * GNU General Public License for more details.
  */
 
+#include <arch/acpigen.h>
 #include <arch/io.h>
 #include <console/console.h>
 #include <cpu/intel/turbo.h>
@@ -238,5 +239,66 @@
 	msr = rdmsr(MSR_CORE_THREAD_COUNT);
 	*num_virt = (msr.lo >> 0) & 0xffff;
 	*num_phys = (msr.lo >> 16) & 0xffff;
-	return (*num_virt  == *num_phys);
+	return (*num_virt == *num_phys);
+}
+
+__attribute__ ((weak))
+int cpu_get_coord_type(void)
+{
+	return HW_ALL;
+}
+
+__attribute__ ((weak))
+uint32_t cpu_get_min_ratio(void)
+{
+	msr_t msr;
+	/* Get bus ratio limits and calculate clock speeds */
+	msr = rdmsr(MSR_PLATFORM_INFO);
+	return ((msr.hi >> 8) & 0xff);	/* Max Efficiency Ratio */
+}
+
+__attribute__ ((weak))
+uint32_t cpu_get_max_ratio(void)
+{
+	msr_t msr;
+	uint32_t ratio_max;
+	if (cpu_config_tdp_levels()) {
+		/* Set max ratio to nominal TDP ratio */
+		msr = rdmsr(MSR_CONFIG_TDP_NOMINAL);
+		ratio_max = msr.lo & 0xff;
+	} else {
+		msr = rdmsr(MSR_PLATFORM_INFO);
+		/* Max Non-Turbo Ratio */
+		ratio_max = (msr.lo >> 8) & 0xff;
+	}
+	return ratio_max;
+}
+
+__attribute__ ((weak))
+uint32_t cpu_get_bus_clock(void)
+{
+	/* CPU bus clock is set by default here to 100MHz.
+	 * This function returns the bus clock in KHz.
+	 */
+	return CONFIG_CPU_BCLK_MHZ * KHz;
+}
+
+__attribute__ ((weak))
+uint32_t cpu_get_power_max(void)
+{
+	msr_t msr;
+	int power_unit;
+
+	msr = rdmsr(MSR_PKG_POWER_SKU_UNIT);
+	power_unit = 2 << ((msr.lo & 0xf) - 1);
+	msr = rdmsr(MSR_PKG_POWER_SKU);
+	return ((msr.lo & 0x7fff) / power_unit) * 1000;
+}
+
+__attribute__ ((weak))
+uint32_t cpu_get_max_turbo_ratio(void)
+{
+	msr_t msr;
+	msr = rdmsr(MSR_TURBO_RATIO_LIMIT);
+	return msr.lo & 0xff;
 }
diff --git a/src/soc/intel/common/block/include/intelblocks/cpulib.h b/src/soc/intel/common/block/include/intelblocks/cpulib.h
index f414521..3d40a92 100644
--- a/src/soc/intel/common/block/include/intelblocks/cpulib.h
+++ b/src/soc/intel/common/block/include/intelblocks/cpulib.h
@@ -121,4 +121,39 @@
  */
 int cpu_read_topology(unsigned int *num_phys, unsigned int *num_virt);
 
+/*
+ * cpu_get_bus_clock returns the bus clock frequency in KHz.
+ * This is the value the clock ratio is multiplied with.
+ */
+uint32_t cpu_get_bus_clock(void);
+
+/*
+ * cpu_get_coord_type returns coordination type (SW_ANY or SW_ALL or HW_ALL)
+ * which is used to populate _PSD object.
+ */
+int cpu_get_coord_type(void);
+
+/*
+ * cpu_get_min_ratio returns the minimum frequency ratio that is supported
+ * by this processor
+ */
+uint32_t cpu_get_min_ratio(void);
+
+/*
+ * cpu_get_max_ratio returns the nominal TDP ratio if available or the
+ * maximum non turbo frequency ratio for this processor
+ */
+uint32_t cpu_get_max_ratio(void);
+
+/*
+ * cpu_get_power_max calculates CPU TDP in mW
+ */
+uint32_t cpu_get_power_max(void);
+
+/*
+ * cpu_get_max_turbo_ratio returns the maximum turbo ratio limit for the
+ * processor
+ */
+uint32_t cpu_get_max_turbo_ratio(void);
+
 #endif	/* SOC_INTEL_COMMON_BLOCK_CPULIB_H */

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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: Id34eb7e03069656238ca0cbdf6ce33f116e0e413
Gerrit-Change-Number: 21051
Gerrit-PatchSet: 1
Gerrit-Owner: Shaunak Saha <shaunak.saha at intel.com>
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