[coreboot-gerrit] Change in coreboot[master]: soc/intel/skylake: Fix SGX init sequence.

[Pratikkumar V Prajapati (Code Review)]

Pratikkumar V Prajapati has uploaded this change for review. ( https://review.coreboot.org/21007


Change subject: soc/intel/skylake: Fix SGX init sequence.
......................................................................

soc/intel/skylake: Fix SGX init sequence.

Configure core PRMRR first on all the cores and then follow
the SGX init sequence. Second microcode load would run the
MCHECK. To pass MCHECK, PRMRR on all cores needs to be
configured first. Hence, PRMRR configuration would be called
from soc_core_init while MP init for each core and then from
soc_init_cpus, BSP would call sgx_configure for each core
(including for itself). This code flow satisfies the MCHECK
passing pre-conditions; and apparently this patch fixes the
behavior of calling configure_sgx() “again” for BSP. (So
removed the TODO comment also).

Change-Id: I88f330eb9757cdc3dbfc7609729c6ceb7d58a0e1
Signed-off-by: Pratik Prajapati <pratikkumar.v.prajapati at intel.com>
---
M src/soc/intel/skylake/cpu.c
1 file changed, 3 insertions(+), 9 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/07/21007/1

diff --git a/src/soc/intel/skylake/cpu.c b/src/soc/intel/skylake/cpu.c
index 1a08191..e20e5a0 100644
--- a/src/soc/intel/skylake/cpu.c
+++ b/src/soc/intel/skylake/cpu.c
@@ -437,8 +437,8 @@
 	/* Enable Turbo */
 	enable_turbo();
 
-	/* Configure SGX */
-	sgx_configure(microcode);
+	/* Configure Core PRMRR for SGX. */
+	prmrr_core_configure();
 }
 
 static int adjust_apic_id(int index, int apic_id)
@@ -499,13 +499,7 @@
 	/* Thermal throttle activation offset */
 	configure_thermal_target();
 
-	/*
-	 * TODO: somehow calling configure_sgx() in cpu_core_init() is not
-	 * successful on the BSP (other threads are fine). Have to run it again
-	 * here to get SGX enabled on BSP. This behavior needs to root-caused
-	 * and we shall not have this redundant call.
-	 */
-	sgx_configure(microcode);
+	mp_run_on_all_cpus(sgx_configure, 2000);
 }
 
 int soc_skip_ucode_update(u32 current_patch_id, u32 new_patch_id)

-- 
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I88f330eb9757cdc3dbfc7609729c6ceb7d58a0e1
Gerrit-Change-Number: 21007
Gerrit-PatchSet: 1
Gerrit-Owner: Pratikkumar V Prajapati <pratikkumar.v.prajapati at intel.com>
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