[coreboot-gerrit] Change in coreboot[master]: payload/tianocore: Add patch to preserve coreboot table

[Arthur Heymans (Code Review)]

Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/20968


Change subject: payload/tianocore: Add patch to preserve coreboot table
......................................................................

payload/tianocore: Add patch to preserve coreboot table

Credit for this patch goes to 'ReddestDream'.

Patches pulled from https://github.com/MattDevo/edk2

TESTED on thinkpad X200.

Change-Id: I1517607cee8308c5f5443c58c16ce44056611e92
Signed-off-by: Arthur Heymans <arthur at aheymans.xyz>
---
A payloads/external/tianocore/patches/06_CorebootPayloadPkg_keep_cb_table.patch
1 file changed, 52 insertions(+), 0 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/68/20968/1

diff --git a/payloads/external/tianocore/patches/06_CorebootPayloadPkg_keep_cb_table.patch b/payloads/external/tianocore/patches/06_CorebootPayloadPkg_keep_cb_table.patch
new file mode 100644
index 0000000..649c6ee
--- /dev/null
+++ b/payloads/external/tianocore/patches/06_CorebootPayloadPkg_keep_cb_table.patch
@@ -0,0 +1,52 @@
+From 07742664925f8d055505220258f2589a9c73a80b Mon Sep 17 00:00:00 2001
+From: ReddestDream <reddestdream at gmail.com>
+Date: Wed, 3 May 2017 00:13:28 -0400
+Subject: [PATCH] CbSupportPei: prevent lower coreboot table from being
+ overwritten
+
+Exclude the bottom 4kb from being included in System Memory HoB
+
+diff --git a/CorebootModulePkg/CbSupportPei/CbSupportPei.c b/CorebootModulePkg/CbSupportPei/CbSupportPei.c
+index 262e6b9d7d..da8f060783 100755
+--- a/CorebootModulePkg/CbSupportPei/CbSupportPei.c
++++ b/CorebootModulePkg/CbSupportPei/CbSupportPei.c
+@@ -246,23 +246,20 @@ CbPeiEntryPoint (
+   UINTN                PmGpeEnBase;
+   CB_MEM_INFO          CbMemInfo;
+ 
+-  //
+-  // Report lower 640KB of RAM. Attribute EFI_RESOURCE_ATTRIBUTE_TESTED  
+-  // is intentionally omitted to prevent erasing of the coreboot header  
+-  // record before it is processed by CbParseMemoryInfo.
+-  //
+   BuildResourceDescriptorHob (
+     EFI_RESOURCE_SYSTEM_MEMORY,
+     (
+     EFI_RESOURCE_ATTRIBUTE_PRESENT |
+     EFI_RESOURCE_ATTRIBUTE_INITIALIZED |
++    EFI_RESOURCE_ATTRIBUTE_TESTED |
+     EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE |
+     EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE |
+     EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE |
+     EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE
+     ),
+-    (EFI_PHYSICAL_ADDRESS)(0),
+-    (UINT64)(0xA0000)
++    // Lower 640KB, except for first 4KB where the lower coreboot pointer ("LBIO") resides
++    (EFI_PHYSICAL_ADDRESS)(0 + 0x1000),
++    (UINT64)(0xA0000 - 0x1000)
+     );
+ 
+ 
+@@ -309,7 +306,7 @@ CbPeiEntryPoint (
+   // Set cache on the physical memory
+   //
+   MtrrSetMemoryAttribute (BASE_1MB, LowMemorySize - BASE_1MB, CacheWriteBack);
+-  MtrrSetMemoryAttribute (0, 0xA0000, CacheWriteBack);
++  MtrrSetMemoryAttribute ((0 + 0x1000), (0xA0000 - 0x1000), CacheWriteBack);
+ 
+   //
+   // Create Memory Type Information HOB
+-- 
+2.14.0
+

-- 
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I1517607cee8308c5f5443c58c16ce44056611e92
Gerrit-Change-Number: 20968
Gerrit-PatchSet: 1
Gerrit-Owner: Arthur Heymans <arthur at aheymans.xyz>
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