[coreboot-gerrit] Change in coreboot[master]: arch/x86: make postcar TempRamExit call generic
Marshall Dawson (Code Review)
gerrit at coreboot.org
Sat Aug 12 00:44:17 CEST 2017
Marshall Dawson has uploaded this change for review. ( https://review.coreboot.org/20965
Change subject: arch/x86: make postcar TempRamExit call generic
......................................................................
arch/x86: make postcar TempRamExit call generic
Move the FSP-specific call for tearing down cache-as-RAM out of postcar.c
and replace it with an empty weak function.
This patch omits checking if (IS_ENABLED(CONFIG_FSP_CAR)). The
temp_ram_exit.c file with the real fsp_temp_ram_exit() is only built
when CONFIG_FSP_CAR is true.
Change-Id: I9adbb1f2a7b2ff50d9f36d5a3640f63410c09479
Signed-off-by: Marshall Dawson <marshalldawson3rd at gmail.com>
---
M src/arch/x86/include/arch/cpu.h
M src/arch/x86/postcar.c
M src/drivers/intel/fsp2_0/temp_ram_exit.c
3 files changed, 16 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/65/20965/1
diff --git a/src/arch/x86/include/arch/cpu.h b/src/arch/x86/include/arch/cpu.h
index 8a44ef9..a379d20 100644
--- a/src/arch/x86/include/arch/cpu.h
+++ b/src/arch/x86/include/arch/cpu.h
@@ -297,6 +297,13 @@
* utilizes prog_run() internally.
*/
void run_postcar_phase(struct postcar_frame *pcf);
+
+/*
+ * Generic call from postcar for relying on FSP or binayPI to
+ * perform the cache-as-ram teardown.
+ */
+void run_blob_temp_ram_exit(void);
+
#endif
#endif /* ARCH_CPU_H */
diff --git a/src/arch/x86/postcar.c b/src/arch/x86/postcar.c
index 34a4335..099650a 100644
--- a/src/arch/x86/postcar.c
+++ b/src/arch/x86/postcar.c
@@ -13,18 +13,18 @@
* GNU General Public License for more details.
*/
+#include <arch/cpu.h>
#include <cbmem.h>
#include <console/console.h>
#include <main_decl.h>
#include <program_loading.h>
#include <soc/intel/common/util.h>
-#include <fsp/util.h>
+
+__attribute__((weak)) void run_blob_temp_ram_exit(void) { /* do nothing */ }
void main(void)
{
- /* Call TempRamExit FSP API if enabled. */
- if (IS_ENABLED(CONFIG_FSP_CAR))
- fsp_temp_ram_exit();
+ run_blob_temp_ram_exit();
console_init();
diff --git a/src/drivers/intel/fsp2_0/temp_ram_exit.c b/src/drivers/intel/fsp2_0/temp_ram_exit.c
index 21eb367..fe33b74 100644
--- a/src/drivers/intel/fsp2_0/temp_ram_exit.c
+++ b/src/drivers/intel/fsp2_0/temp_ram_exit.c
@@ -47,3 +47,8 @@
die("TempRamExit returned an error!\n");
}
}
+
+void run_blob_temp_ram_exit(void)
+{
+ fsp_temp_ram_exit();
+}
--
To view, visit https://review.coreboot.org/20965
To unsubscribe, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I9adbb1f2a7b2ff50d9f36d5a3640f63410c09479
Gerrit-Change-Number: 20965
Gerrit-PatchSet: 1
Gerrit-Owner: Marshall Dawson <marshalldawson3rd at gmail.com>
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