[coreboot-gerrit] Change in coreboot[master]: soc/intel/skylake: Configure FSP to skip ME MBP step

Furquan Shaikh (Code Review) gerrit at coreboot.org
Fri Aug 11 02:04:41 CEST 2017


Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/20951 )

Change subject: soc/intel/skylake: Configure FSP to skip ME MBP step
......................................................................


Patch Set 1: Code-Review+2

(1 comment)

https://review.coreboot.org/#/c/20951/1//COMMIT_MSG
Commit Message:

https://review.coreboot.org/#/c/20951/1//COMMIT_MSG@13
PS1, Line 13: boot with FSP debug enabled binary and ensure that the
            : output indicates this step is being skipped:
            : Skipping MBP data due to SkipMbpHob set!
Does this also help with the boot time?



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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: comment
Gerrit-Change-Id: I5ea22ec4b8b47fa17b1cf2bf562337bfaad5ec0d
Gerrit-Change-Number: 20951
Gerrit-PatchSet: 1
Gerrit-Owner: Duncan Laurie <dlaurie at chromium.org>
Gerrit-Reviewer: Furquan Shaikh <furquan at google.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply at coreboot.org>
Gerrit-Comment-Date: Fri, 11 Aug 2017 00:04:41 +0000
Gerrit-HasComments: Yes
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