[coreboot-gerrit] Change in coreboot[master]: ec/google: update ec_commands.h

[Patrick Georgi (Code Review)]

Patrick Georgi has uploaded this change for review. ( https://review.coreboot.org/20945


Change subject: ec/google: update ec_commands.h
......................................................................

ec/google: update ec_commands.h

Copy from chrome-ec codebase, except for keeping the long-form license
header.

BUG=b:64468585
BRANCH=none
TEST=with the other sku-id related patches applied, coreboot obtains the
right SKU ID from EC

Change-Id: I513123547f3854945e827d2f7f6c0df6591886eb
Signed-off-by: Patrick Georgi <pgeorgi at google.com>
---
M src/ec/google/chromeec/ec_commands.h
1 file changed, 30 insertions(+), 1 deletion(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/45/20945/1

diff --git a/src/ec/google/chromeec/ec_commands.h b/src/ec/google/chromeec/ec_commands.h
index 3e093f6..25ef584 100644
--- a/src/ec/google/chromeec/ec_commands.h
+++ b/src/ec/google/chromeec/ec_commands.h
@@ -31,7 +31,7 @@
 #ifndef __CROS_EC_EC_COMMANDS_H
 #define __CROS_EC_EC_COMMANDS_H
 
-#ifndef __ACPI__
+#if !defined(__ACPI__) && !defined(__KERNEL__)
 #include <stdint.h>
 #endif
 
@@ -1121,6 +1121,14 @@
 };
 
 /*****************************************************************************/
+/* Get the board's SKU ID from EC */
+#define EC_CMD_GET_SKU_ID 0x000E
+
+struct __ec_align4 ec_response_sku_id {
+	uint32_t sku_id;
+};
+
+/*****************************************************************************/
 /* Flash commands */
 
 /* Get flash info */
@@ -1151,6 +1159,13 @@
 /* Flags for version 1+ flash info command */
 /* EC flash erases bits to 0 instead of 1 */
 #define EC_FLASH_INFO_ERASE_TO_0 (1 << 0)
+
+/* Flash must be selected for read/write/erase operations to succeed.  This may
+ * be necessary on a chip where write/erase can be corrupted by other board
+ * activity, or where the chip needs to enable some sort of programming voltage,
+ * or where the read/write/erase operations require cleanly suspending other
+ * chip functionality. */
+#define EC_FLASH_INFO_SELECT_REQUIRED (1 << 1)
 
 /*
  * Version 1 returns the same initial fields as version 0, with additional
@@ -1421,6 +1436,16 @@
 	/* Status registers from command 0x05 and 0x35 */
 	uint8_t sr1, sr2;
 };
+
+
+/* Select flash during flash operations */
+#define EC_CMD_FLASH_SELECT 0x0019
+
+struct __ec_align4 ec_params_flash_select {
+	/* 1 to select flash, 0 to deselect flash */
+	uint8_t select;
+};
+
 
 /*****************************************************************************/
 /* PWM commands */
@@ -2980,6 +3005,7 @@
 #define EC_MKBP_POWER_BUTTON	0
 #define EC_MKBP_VOL_UP		1
 #define EC_MKBP_VOL_DOWN	2
+#define EC_MKBP_RECOVERY	3
 
 /* Switches */
 #define EC_MKBP_LID_OPEN	0
@@ -3935,6 +3961,9 @@
 
 #define EC_CMD_USB_PD_PORTS 0x0102
 
+/* Maximum number of PD ports on a device, num_ports will be <= this */
+#define EC_USB_PD_MAX_PORTS 8
+
 struct __ec_align1 ec_response_usb_pd_ports {
 	uint8_t num_ports;
 };

-- 
To view, visit https://review.coreboot.org/20945
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I513123547f3854945e827d2f7f6c0df6591886eb
Gerrit-Change-Number: 20945
Gerrit-PatchSet: 1
Gerrit-Owner: Patrick Georgi <pgeorgi at google.com>
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