[coreboot-gerrit] Change in coreboot[master]: intel/common/block/smm: Update smihandler to handle gpi

[Brandon Breitenstein (Code Review)]

Brandon Breitenstein has uploaded this change for review. ( https://review.coreboot.org/20917


Change subject: intel/common/block/smm: Update smihandler to handle gpi
......................................................................

intel/common/block/smm: Update smihandler to handle gpi

Updating the common smihandler to handler gpi events which
originally were going to be left to each soc to handle. After
some more analysis the gpi handler can also be commonized.

Change-Id: I6273fe846587137938bbcffa3a92736b91982574
Signed-off-by: Brandon Breitenstein <brandon.breitenstein at intel.com>
---
M src/mainboard/google/reef/smihandler.c
M src/soc/intel/apollolake/include/soc/smm.h
M src/soc/intel/apollolake/smihandler.c
M src/soc/intel/common/block/smm/smihandler.c
4 files changed, 24 insertions(+), 19 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/17/20917/1

diff --git a/src/mainboard/google/reef/smihandler.c b/src/mainboard/google/reef/smihandler.c
index fe4f8c4..d8b4702 100644
--- a/src/mainboard/google/reef/smihandler.c
+++ b/src/mainboard/google/reef/smihandler.c
@@ -18,8 +18,8 @@
 #include <baseboard/variants.h>
 #include <cpu/x86/smm.h>
 #include <ec/google/chromeec/smm.h>
+#include <intelblocks/smihandler.h>
 #include <soc/pm.h>
-#include <soc/smm.h>
 #include <soc/gpio.h>
 #include <variant/ec.h>
 #include <variant/gpio.h>
diff --git a/src/soc/intel/apollolake/include/soc/smm.h b/src/soc/intel/apollolake/include/soc/smm.h
index b37694e..eda0bc4 100644
--- a/src/soc/intel/apollolake/include/soc/smm.h
+++ b/src/soc/intel/apollolake/include/soc/smm.h
@@ -30,7 +30,4 @@
 void southbridge_smm_clear_state(void);
 void southbridge_smm_enable_smi(void);
 
-/* Mainboard handler for GPI SMIs*/
-void mainboard_smi_gpi_handler(const struct gpi_status *sts);
-
 #endif
diff --git a/src/soc/intel/apollolake/smihandler.c b/src/soc/intel/apollolake/smihandler.c
index f834b1d..f1de888 100644
--- a/src/soc/intel/apollolake/smihandler.c
+++ b/src/soc/intel/apollolake/smihandler.c
@@ -34,21 +34,6 @@
 	return &em64t100_smm_ops;
 }
 
-void __attribute__((weak))
-mainboard_smi_gpi_handler(const struct gpi_status *sts) { }
-
-static void southbridge_smi_gpi(
-	const struct smm_save_state_ops *save_state_ops)
-{
-	struct gpi_status smi_sts;
-
-	gpi_clear_get_smi_status(&smi_sts);
-	mainboard_smi_gpi_handler(&smi_sts);
-
-	/* Clear again after mainboard handler */
-	gpi_clear_get_smi_status(&smi_sts);
-}
-
 const smi_handler_t southbridge_smi[32] = {
 	[SLP_SMI_STS] = smihandler_southbridge_sleep,
 	[APM_SMI_STS] = smihandler_southbridge_apmc,
diff --git a/src/soc/intel/common/block/smm/smihandler.c b/src/soc/intel/common/block/smm/smihandler.c
index 7a4be47..90ac61d 100644
--- a/src/soc/intel/common/block/smm/smihandler.c
+++ b/src/soc/intel/common/block/smm/smihandler.c
@@ -356,6 +356,29 @@
 	printk(BIOS_DEBUG, "Periodic SMI.\n");
 }
 
+void __attribute__((weak))
+mainboard_smi_gpi_handler(const struct gpi_status *sts) { }
+
+void smihandler_southbridge_gpi(
+        const struct smm_save_state_ops *save_state_ops)
+{
+        struct gpi_status smi_sts;
+
+        gpi_clear_get_smi_status(&smi_sts);
+        mainboard_smi_gpi_handler(&smi_sts);
+
+        /* Clear again after mainboard handler */
+        gpi_clear_get_smi_status(&smi_sts);
+}
+
+void __attribute__((weak)) mainboard_smi_espi_handler(void) { }
+
+void smihandler_southbridge_espi(
+        const struct smm_save_state_ops *save_state_ops)
+{
+        mainboard_smi_espi_handler();
+}
+
 void southbridge_smi_handler(void)
 {
 	int i;

-- 
To view, visit https://review.coreboot.org/20917
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I6273fe846587137938bbcffa3a92736b91982574
Gerrit-Change-Number: 20917
Gerrit-PatchSet: 1
Gerrit-Owner: Brandon Breitenstein <brandon.breitenstein at intel.com>
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