[coreboot-gerrit] Change in coreboot[master]: nb/intel/sandybridge/raminit: Improve IGD detection

[Patrick Rudolph (Code Review)]

Patrick Rudolph has uploaded this change for review. ( https://review.coreboot.org/20909


Change subject: nb/intel/sandybridge/raminit: Improve IGD detection
......................................................................

nb/intel/sandybridge/raminit: Improve IGD detection

Allocate GFX stolen and GTT memory in case the device is enabled.
Do not depend on VGA decode enable setting, as the IGD might not
decode VGA as there's a DGPU in place.

Change-Id: I4bace296ead8220c930a49686f62e94d93da7f39
Signed-off-by: Patrick Rudolph <siro at das-labor.org>
---
M src/northbridge/intel/sandybridge/raminit_common.c
1 file changed, 2 insertions(+), 2 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/09/20909/1

diff --git a/src/northbridge/intel/sandybridge/raminit_common.c b/src/northbridge/intel/sandybridge/raminit_common.c
index c6ff551..f42b06d 100644
--- a/src/northbridge/intel/sandybridge/raminit_common.c
+++ b/src/northbridge/intel/sandybridge/raminit_common.c
@@ -481,8 +481,8 @@
 
 	mmiosize = get_mmio_size();
 
-	ggc = pci_read_config16(NORTHBRIDGE, GGC);
-	if (!(ggc & 2)) {
+	if (pci_read_config32(NORTHBRIDGE, DEVEN) & DEVEN_IGD) {
+		const uint16_t ggc = pci_read_config16(NORTHBRIDGE, GGC);
 		gfxstolen = ((ggc >> 3) & 0x1f) * 32;
 		gttsize = ((ggc >> 8) & 0x3);
 	} else {

-- 
To view, visit https://review.coreboot.org/20909
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I4bace296ead8220c930a49686f62e94d93da7f39
Gerrit-Change-Number: 20909
Gerrit-PatchSet: 1
Gerrit-Owner: Patrick Rudolph <siro at das-labor.org>
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