[coreboot-gerrit] Change in coreboot[master]: AGESA f15 f15tn f16kb: Add extra check for incorrect SPD data

[Aladyshev Konstantin (Code Review)]

Aladyshev Konstantin has uploaded a new patch set (#2). ( https://review.coreboot.org/20839 )

Change subject: AGESA f15 f15tn f16kb: Add extra check for incorrect SPD data
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AGESA f15 f15tn f16kb: Add extra check for incorrect SPD data

If memory module is broken and its SPD data is wrong in a way
that Data[11] or Data[9]&0xF is equal to zero, division by 0
in DIMM speed calculation could reboot CPU. Add extra check
to avoid this issue.

Change-Id: Ica92850cc77e1f7cbf3e7e44717de42a03b93bbe
Signed-off-by: Konstantin Aladyshev <aladyshev22 at gmail.com>
---
M src/vendorcode/amd/agesa/f15/Proc/Mem/Feat/DMI/mfDMI.c
M src/vendorcode/amd/agesa/f15tn/Proc/Mem/Feat/DMI/mfDMI.c
M src/vendorcode/amd/agesa/f16kb/Proc/Mem/Feat/DMI/mfDMI.c
3 files changed, 21 insertions(+), 0 deletions(-)


  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/39/20839/2
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newpatchset
Gerrit-Change-Id: Ica92850cc77e1f7cbf3e7e44717de42a03b93bbe
Gerrit-Change-Number: 20839
Gerrit-PatchSet: 2
Gerrit-Owner: Aladyshev Konstantin <aladyshev22 at gmail.com>
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