[coreboot-gerrit] Change in coreboot[master]: soc/intel/apollolake: Use common I2C code from intelblocks
Rizwan Qureshi (Code Review)
gerrit at coreboot.org
Fri Apr 28 20:51:37 CEST 2017
Rizwan Qureshi has uploaded a new change for review. ( https://review.coreboot.org/19480 )
Change subject: soc/intel/apollolake: Use common I2C code from intelblocks
......................................................................
soc/intel/apollolake: Use common I2C code from intelblocks
* Stop using code from soc/intel/common/lpss_i2c.c.
* Remove early i2c initialization code from bootblock.
* Refactor i2c.c file to implement SoC specific methods
required by the I2C IP block.
Change-Id: I38cbf5ca5c5102d6c8501cb9ffc9077d22ebccff
Signed-off-by: Rizwan Qureshi <rizwan.qureshi at intel.com>
---
M src/soc/intel/apollolake/Kconfig
M src/soc/intel/apollolake/Makefile.inc
M src/soc/intel/apollolake/chip.h
M src/soc/intel/apollolake/i2c.c
D src/soc/intel/apollolake/i2c_early.c
D src/soc/intel/apollolake/include/soc/i2c.h
6 files changed, 41 insertions(+), 232 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/80/19480/4
diff --git a/src/soc/intel/apollolake/Kconfig b/src/soc/intel/apollolake/Kconfig
index dc639a2..5177fd3 100644
--- a/src/soc/intel/apollolake/Kconfig
+++ b/src/soc/intel/apollolake/Kconfig
@@ -53,13 +53,13 @@
select SOC_INTEL_COMMON_ACPI
select SOC_INTEL_COMMON_ACPI_WAKE_SOURCE
select SOC_INTEL_COMMON_BLOCK
+ select SOC_INTEL_COMMON_BLOCK_I2C
select SOC_INTEL_COMMON_BLOCK_LPSS
select SOC_INTEL_COMMON_BLOCK_PCR
select SOC_INTEL_COMMON_BLOCK_SA
select SOC_INTEL_COMMON_BLOCK_RTC
select SOC_INTEL_COMMON_BLOCK_SA
select SOC_INTEL_COMMON_BLOCK_UART
- select SOC_INTEL_COMMON_LPSS_I2C
select SOC_INTEL_COMMON_SMI
select SOC_INTEL_COMMON_SPI_FLASH_PROTECT
select UDELAY_TSC
@@ -317,4 +317,7 @@
string
default "aplk"
+config SOC_INTEL_COMMON_BLOCK_I2C_MAX
+ int
+ default 8
endif
diff --git a/src/soc/intel/apollolake/Makefile.inc b/src/soc/intel/apollolake/Makefile.inc
index 1e6aafd..f93f019 100644
--- a/src/soc/intel/apollolake/Makefile.inc
+++ b/src/soc/intel/apollolake/Makefile.inc
@@ -28,7 +28,7 @@
romstage-y += flash_ctrlr.c
romstage-y += gpio.c
romstage-y += heci.c
-romstage-y += i2c_early.c
+romstage-y += i2c.c
romstage-y += itss.c
romstage-$(CONFIG_SOC_UART_DEBUG) += uart_early.c
romstage-y += lpc_lib.c
@@ -93,7 +93,7 @@
verstage-y += car.c
verstage-y += flash_ctrlr.c
-verstage-y += i2c_early.c
+verstage-y += i2c.c
verstage-y += heci.c
verstage-y += memmap.c
verstage-y += mmap_boot.c
diff --git a/src/soc/intel/apollolake/chip.h b/src/soc/intel/apollolake/chip.h
index 3221be7..bf25009 100644
--- a/src/soc/intel/apollolake/chip.h
+++ b/src/soc/intel/apollolake/chip.h
@@ -21,7 +21,7 @@
#include <soc/gpe.h>
#include <soc/gpio_defs.h>
#include <soc/gpio.h>
-#include <soc/intel/common/lpss_i2c.h>
+#include <intelblocks/lpss_i2c.h>
#include <device/i2c.h>
#include <soc/pm.h>
#include <soc/usb.h>
diff --git a/src/soc/intel/apollolake/i2c.c b/src/soc/intel/apollolake/i2c.c
index 9aadc78..c9ef85a 100644
--- a/src/soc/intel/apollolake/i2c.c
+++ b/src/soc/intel/apollolake/i2c.c
@@ -1,114 +1,65 @@
/*
* This file is part of the coreboot project.
*
- * Copyright 2016 Google Inc.
+ * Copyright 2017 Google Inc.
+ * Copyright 2017 Intel Corporation.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
-
-#include <arch/acpi_device.h>
-#include <arch/acpigen.h>
+#include <console/console.h>
#include <device/device.h>
-#include <device/i2c.h>
-#include <device/pci.h>
#include <device/pci_def.h>
-#include <device/pci_ids.h>
-#include <soc/i2c.h>
-#include <soc/intel/common/lpss_i2c.h>
+#include <intelblocks/lpss_i2c.h>
+#include <soc/iomap.h>
#include <soc/pci_devs.h>
-#include <soc/pci_ids.h>
#include "chip.h"
-uintptr_t lpss_i2c_base_address(unsigned int bus)
+const struct lpss_i2c_bus_config *i2c_get_soc_cfg(void)
{
- unsigned int devfn;
- struct device *dev;
- struct resource *res;
+ DEVTREE_CONST struct soc_intel_apollolake_config *config;
+ int devfn = SA_DEVFN_ROOT;
+ DEVTREE_CONST struct device *dev = dev_find_slot(0, devfn);
- /* bus -> devfn */
- devfn = i2c_bus_to_devfn(bus);
- if (devfn >= 0) {
- /* devfn -> dev */
- dev = dev_find_slot(0, devfn);
- if (dev) {
- /* dev -> bar0 */
- res = find_resource(dev, PCI_BASE_ADDRESS_0);
- if (res)
- return res->base;
- }
+ if (!dev || !dev->chip_info) {
+ printk(BIOS_ERR, "%s: Could not find SoC devicetree config!\n",
+ __func__);
+ return NULL;
}
- return (uintptr_t)NULL;
+ config = dev->chip_info;
+
+ return &config->i2c[0];
}
-static int i2c_dev_to_bus(struct device *dev)
+uintptr_t i2c_get_soc_early_base(unsigned int bus)
{
- return i2c_devfn_to_bus(dev->path.pci.devfn);
+ return PRERAM_I2C_BASE_ADDRESS(bus);
}
-/*
- * The device should already be enabled and out of reset,
- * either from early init in coreboot or FSP-S.
- */
-static void i2c_dev_init(struct device *dev)
+int i2c_soc_devfn_to_bus(unsigned int devfn)
{
- struct soc_intel_apollolake_config *config = dev->chip_info;
- int bus = i2c_dev_to_bus(dev);
-
- if (!config || bus < 0)
- return;
-
- lpss_i2c_init(bus, &config->i2c[bus]);
+ if (PCI_SLOT(devfn) == PCH_DEV_SLOT_SIO1)
+ return PCI_FUNC(devfn);
+ else if (PCI_SLOT(devfn) == PCH_DEV_SLOT_SIO2)
+ return PCI_FUNC(devfn) + 4;
+ else
+ return -1;
}
-static void i2c_fill_ssdt(struct device *dev)
+int i2c_soc_bus_to_devfn(unsigned int bus)
{
- struct soc_intel_apollolake_config *config = dev->chip_info;
- int bus = i2c_dev_to_bus(dev);
-
- if (!config || bus < 0)
- return;
-
- acpigen_write_scope(acpi_device_path(dev));
- lpss_i2c_acpi_fill_ssdt(bus, &config->i2c[bus]);
- acpigen_pop_len();
+ if (bus >= 0 && bus <= 3)
+ return PCI_DEVFN(PCH_DEV_SLOT_SIO1, bus);
+ else if (bus >= 4 && bus <= 7)
+ return PCI_DEVFN(PCH_DEV_SLOT_SIO2, (bus - 4));
+ else
+ return -1;
}
-
-static struct i2c_bus_operations i2c_bus_ops = {
- .dev_to_bus = &i2c_dev_to_bus,
-};
-
-static struct device_operations i2c_dev_ops = {
- .read_resources = &pci_dev_read_resources,
- .set_resources = &pci_dev_set_resources,
- .enable_resources = &pci_dev_enable_resources,
- .scan_bus = &scan_smbus,
- .ops_i2c_bus = &i2c_bus_ops,
- .init = &i2c_dev_init,
- .acpi_fill_ssdt_generator = &i2c_fill_ssdt,
-};
-
-static const unsigned short pci_device_ids[] = {
- PCI_DEVICE_ID_APOLLOLAKE_I2C0,
- PCI_DEVICE_ID_APOLLOLAKE_I2C1,
- PCI_DEVICE_ID_APOLLOLAKE_I2C2,
- PCI_DEVICE_ID_APOLLOLAKE_I2C3,
- PCI_DEVICE_ID_APOLLOLAKE_I2C4,
- PCI_DEVICE_ID_APOLLOLAKE_I2C5,
- PCI_DEVICE_ID_APOLLOLAKE_I2C6,
- PCI_DEVICE_ID_APOLLOLAKE_I2C7,
- 0,
-};
-
-static const struct pci_driver pch_i2c __pci_driver = {
- .ops = &i2c_dev_ops,
- .vendor = PCI_VENDOR_ID_INTEL,
- .devices = pci_device_ids,
-};
diff --git a/src/soc/intel/apollolake/i2c_early.c b/src/soc/intel/apollolake/i2c_early.c
deleted file mode 100644
index 871c762..0000000
--- a/src/soc/intel/apollolake/i2c_early.c
+++ /dev/null
@@ -1,100 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright 2016 Google Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#include <arch/io.h>
-#include <commonlib/helpers.h>
-#include <console/console.h>
-#include <device/device.h>
-#include <device/i2c.h>
-#include <device/pci_def.h>
-#include <intelblocks/lpss.h>
-#include <soc/intel/common/lpss_i2c.h>
-#include <soc/i2c.h>
-#include <soc/iomap.h>
-#include <soc/pci_devs.h>
-#include "chip.h"
-
-static int i2c_early_init_bus(unsigned int bus)
-{
- DEVTREE_CONST struct soc_intel_apollolake_config *config;
- DEVTREE_CONST struct device *tree_dev;
- pci_devfn_t dev;
- int devfn;
- uintptr_t base;
-
- /* Find the PCI device for this bus controller */
- devfn = i2c_bus_to_devfn(bus);
- if (devfn < 0) {
- printk(BIOS_ERR, "I2C%u device not found\n", bus);
- return -1;
- }
-
- /* Look up the controller device in the devicetree */
- dev = PCI_DEV(0, PCI_SLOT(devfn), PCI_FUNC(devfn));
- tree_dev = dev_find_slot(0, devfn);
- if (!tree_dev || !tree_dev->enabled) {
- printk(BIOS_ERR, "I2C%u device not enabled\n", bus);
- return -1;
- }
-
- /* Skip if not enabled for early init */
- config = tree_dev->chip_info;
- if (!config || !config->i2c[bus].early_init) {
- printk(BIOS_ERR, "I2C%u not enabled for early init\n", bus);
- return -1;
- }
-
- /* Prepare early base address for access before memory */
- base = PRERAM_I2C_BASE_ADDRESS(bus);
- pci_write_config32(dev, PCI_BASE_ADDRESS_0, base);
- pci_write_config32(dev, PCI_COMMAND,
- PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER);
-
- /* Take device out of reset */
- lpss_reset_release(base);
-
- /* Initialize the controller */
- if (lpss_i2c_init(bus, &config->i2c[bus]) < 0) {
- printk(BIOS_ERR, "I2C%u failed to initialize\n", bus);
- return -1;
- }
-
- return 0;
-}
-
-uintptr_t lpss_i2c_base_address(unsigned int bus)
-{
- unsigned int devfn;
- pci_devfn_t dev;
- uintptr_t base;
-
- /* Find device+function for this controller */
- devfn = i2c_bus_to_devfn(bus);
- if (devfn < 0)
- return (uintptr_t)NULL;
-
- /* Form a PCI address for this device */
- dev = PCI_DEV(0, PCI_SLOT(devfn), PCI_FUNC(devfn));
-
- /* Read the first base address for this device */
- base = ALIGN_DOWN(pci_read_config32(dev, PCI_BASE_ADDRESS_0), 16);
-
- /* Attempt to initialize bus if base is not set yet */
- if (!base && !i2c_early_init_bus(bus))
- base = ALIGN_DOWN(pci_read_config32(dev, PCI_BASE_ADDRESS_0),
- 16);
-
- return base;
-}
diff --git a/src/soc/intel/apollolake/include/soc/i2c.h b/src/soc/intel/apollolake/include/soc/i2c.h
deleted file mode 100644
index 8839f14..0000000
--- a/src/soc/intel/apollolake/include/soc/i2c.h
+++ /dev/null
@@ -1,45 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright 2016 Google Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#ifndef _SOC_APOLLOLAKE_I2C_H_
-#define _SOC_APOLLOLAKE_I2C_H_
-
-#include <device/pci_def.h>
-#include <soc/pci_devs.h>
-
-/* Convert I2C bus number to PCI device and function */
-static inline int i2c_bus_to_devfn(unsigned int bus)
-{
- if (bus >= 0 && bus <= 3)
- return PCI_DEVFN(PCH_DEV_SLOT_SIO1, bus);
- else if (bus >= 4 && bus <= 7)
- return PCI_DEVFN(PCH_DEV_SLOT_SIO2, (bus - 4));
- else
- return -1;
-}
-
-/* Convert PCI device and function to I2C bus number */
-static inline int i2c_devfn_to_bus(unsigned int devfn)
-{
- if (PCI_SLOT(devfn) == PCH_DEV_SLOT_SIO1)
- return PCI_FUNC(devfn);
- else if (PCI_SLOT(devfn) == PCH_DEV_SLOT_SIO2)
- return PCI_FUNC(devfn) + 4;
- else
- return -1;
-}
-
-#endif /* _SOC_APOLLOLAKE_I2C_H_ */
--
To view, visit https://review.coreboot.org/19480
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Gerrit-MessageType: newchange
Gerrit-Change-Id: I38cbf5ca5c5102d6c8501cb9ffc9077d22ebccff
Gerrit-PatchSet: 4
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Owner: Rizwan Qureshi <rizwan.qureshi at intel.com>
Gerrit-Reviewer: Aaron Durbin <adurbin at chromium.org>
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