[coreboot-gerrit] Change in coreboot[master]: scarlet/gru: skip usbphy1 setup for Scarlet

[Philip Chen (Code Review)]

Philip Chen has uploaded a new change for review. ( https://review.coreboot.org/19489 )

Change subject: scarlet/gru: skip usbphy1 setup for Scarlet
......................................................................

scarlet/gru: skip usbphy1 setup for Scarlet

BUG=b:37685249
TEST=boot Scarlet, check the firmware log, and confirm
no errors about USB1

Change-Id: I66e0d8a235cc9057964f7abca32bc692d41e88fd
---
M src/mainboard/google/gru/mainboard.c
1 file changed, 25 insertions(+), 14 deletions(-)


  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/89/19489/1

diff --git a/src/mainboard/google/gru/mainboard.c b/src/mainboard/google/gru/mainboard.c
index b8a3e55..0b0d541 100644
--- a/src/mainboard/google/gru/mainboard.c
+++ b/src/mainboard/google/gru/mainboard.c
@@ -250,13 +250,16 @@
 	 * Set max ODT compensation voltage and current tuning reference.
 	 */
 	write32(&rk3399_grf->usbphy0_ctrl[3], RK_CLRSETBITS(0xfff, 0x2e3));
-	write32(&rk3399_grf->usbphy1_ctrl[3], RK_CLRSETBITS(0xfff, 0x2e3));
+	if (!IS_ENABLED(CONFIG_BOARD_GOOGLE_SCARLET))
+		write32(&rk3399_grf->usbphy1_ctrl[3],
+			RK_CLRSETBITS(0xfff, 0x2e3));
 
 	/* Set max pre-emphasis level on PHY0 and PHY1. */
 	write32(&rk3399_grf->usbphy0_ctrl[12],
 		RK_CLRSETBITS(0xffff, 0xa7));
-	write32(&rk3399_grf->usbphy1_ctrl[12],
-		RK_CLRSETBITS(0xffff, 0xa7));
+	if (!IS_ENABLED(CONFIG_BOARD_GOOGLE_SCARLET))
+		write32(&rk3399_grf->usbphy1_ctrl[12],
+			RK_CLRSETBITS(0xffff, 0xa7));
 
 	/*
 	 * 1. Disable the pre-emphasize in eop state and chirp
@@ -269,10 +272,12 @@
 	 */
 	write32(&rk3399_grf->usbphy0_ctrl[0],
 		RK_CLRSETBITS(7 << 13 | 3 << 0, 6 << 13));
-	write32(&rk3399_grf->usbphy1_ctrl[0],
-		RK_CLRSETBITS(7 << 13 | 3 << 0, 6 << 13));
+	if (!IS_ENABLED(CONFIG_BOARD_GOOGLE_SCARLET))
+		write32(&rk3399_grf->usbphy1_ctrl[0],
+			RK_CLRSETBITS(7 << 13 | 3 << 0, 6 << 13));
 	write32(&rk3399_grf->usbphy0_ctrl[13], RK_CLRBITS(3 << 0));
-	write32(&rk3399_grf->usbphy1_ctrl[13], RK_CLRBITS(3 << 0));
+	if (!IS_ENABLED(CONFIG_BOARD_GOOGLE_SCARLET))
+		write32(&rk3399_grf->usbphy1_ctrl[13], RK_CLRBITS(3 << 0));
 
 	/*
 	 * ODT auto compensation bypass, and set max driver
@@ -280,8 +285,9 @@
 	 */
 	write32(&rk3399_grf->usbphy0_ctrl[2],
 		RK_CLRSETBITS(0x7e << 4, 0x60 << 4));
-	write32(&rk3399_grf->usbphy1_ctrl[2],
-		RK_CLRSETBITS(0x7e << 4, 0x60 << 4));
+	if (!IS_ENABLED(CONFIG_BOARD_GOOGLE_SCARLET))
+		write32(&rk3399_grf->usbphy1_ctrl[2],
+			RK_CLRSETBITS(0x7e << 4, 0x60 << 4));
 
 	/*
 	 * ODT auto refresh bypass, and set the max bias current
@@ -289,22 +295,26 @@
 	 */
 	write32(&rk3399_grf->usbphy0_ctrl[3],
 		RK_CLRSETBITS(0x21c, 1 << 4));
-	write32(&rk3399_grf->usbphy1_ctrl[3],
-		RK_CLRSETBITS(0x21c, 1 << 4));
+	if (!IS_ENABLED(CONFIG_BOARD_GOOGLE_SCARLET))
+		write32(&rk3399_grf->usbphy1_ctrl[3],
+			RK_CLRSETBITS(0x21c, 1 << 4));
 
 	/*
 	 * ODT auto compensation bypass, and set default driver
 	 * strength only for PHY0 and PHY1 host-port.
 	 */
 	write32(&rk3399_grf->usbphy0_ctrl[15], RK_SETBITS(1 << 10));
-	write32(&rk3399_grf->usbphy1_ctrl[15], RK_SETBITS(1 << 10));
+	if (!IS_ENABLED(CONFIG_BOARD_GOOGLE_SCARLET))
+		write32(&rk3399_grf->usbphy1_ctrl[15], RK_SETBITS(1 << 10));
 
 	/* ODT auto refresh bypass only for PHY0 and PHY1 host-port. */
 	write32(&rk3399_grf->usbphy0_ctrl[16], RK_CLRBITS(1 << 9));
-	write32(&rk3399_grf->usbphy1_ctrl[16], RK_CLRBITS(1 << 9));
+	if (!IS_ENABLED(CONFIG_BOARD_GOOGLE_SCARLET))
+		write32(&rk3399_grf->usbphy1_ctrl[16], RK_CLRBITS(1 << 9));
 
 	setup_usb_otg0();
-	setup_usb_otg1();
+	if (!IS_ENABLED(CONFIG_BOARD_GOOGLE_SCARLET))
+		setup_usb_otg1();
 
 	/*
 	 * Need to power-cycle USB ports for use in firmware, since some devices
@@ -314,7 +324,8 @@
 	 */
 	if (display_init_required()) {
 		usb_power_cycle(0);
-		usb_power_cycle(1);
+		if (!IS_ENABLED(CONFIG_BOARD_GOOGLE_SCARLET))
+			usb_power_cycle(1);
 	}
 }
 

-- 
To view, visit https://review.coreboot.org/19489
To unsubscribe, visit https://review.coreboot.org/settings

Gerrit-MessageType: newchange
Gerrit-Change-Id: I66e0d8a235cc9057964f7abca32bc692d41e88fd
Gerrit-PatchSet: 1
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Owner: Philip Chen <philipchen at google.com>