[coreboot-gerrit] Change in coreboot[master]: mb/intel/d510mo: enable ACPI resume from S3

[Martin Roth (Code Review)]

Martin Roth has submitted this change and it was merged. ( https://review.coreboot.org/19416 )

Change subject: mb/intel/d510mo: enable ACPI resume from S3
......................................................................


mb/intel/d510mo: enable ACPI resume from S3

Replace ram_check with quick_ram_check, because ram_check is slow and
is destructive for dram content.

Change-Id: I5fb1bfe711549aabb6e597bda22848988a7e9cbe
Signed-off-by: Arthur Heymans <arthur at aheymans.xyz>
Reviewed-on: https://review.coreboot.org/19416
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki at gmail.com>
Reviewed-by: Paul Menzel <paulepanter at users.sourceforge.net>
---
M src/mainboard/intel/d510mo/Kconfig
M src/mainboard/intel/d510mo/romstage.c
2 files changed, 16 insertions(+), 5 deletions(-)

Approvals:
  Kyösti Mälkki: Looks good to me, approved
  Paul Menzel: Looks good to me, but someone else must approve
  build bot (Jenkins): Verified



diff --git a/src/mainboard/intel/d510mo/Kconfig b/src/mainboard/intel/d510mo/Kconfig
index 757a24c..0f747cc 100644
--- a/src/mainboard/intel/d510mo/Kconfig
+++ b/src/mainboard/intel/d510mo/Kconfig
@@ -22,6 +22,7 @@
 	select SOUTHBRIDGE_INTEL_I82801GX
 	select SUPERIO_WINBOND_W83627THG
 	select HAVE_ACPI_TABLES
+	select HAVE_ACPI_RESUME
 	select BOARD_ROMSIZE_KB_1024
 	select MAINBOARD_HAS_NATIVE_VGA_INIT
 	select INTEL_INT15
diff --git a/src/mainboard/intel/d510mo/romstage.c b/src/mainboard/intel/d510mo/romstage.c
index f99e185..1bf2b61 100644
--- a/src/mainboard/intel/d510mo/romstage.c
+++ b/src/mainboard/intel/d510mo/romstage.c
@@ -103,6 +103,7 @@
 	const u8 spd_addrmap[4] = { 0x50, 0x51, 0, 0 };
 	int cbmem_was_initted;
 	int s3resume = 0;
+	int boot_path;
 
 	if (bist == 0)
 		enable_lapic();
@@ -124,15 +125,24 @@
 
 	post_code(0x30);
 
+	s3resume = southbridge_detect_s3_resume();
+
+	if (s3resume) {
+		boot_path = BOOT_PATH_RESUME;
+	} else {
+		if (MCHBAR32(0xf14) & (1 << 8)) /* HOT RESET */
+			boot_path = BOOT_PATH_RESET;
+		else
+			boot_path = BOOT_PATH_NORMAL;
+	}
+
 	printk(BIOS_DEBUG, "Initializing memory\n");
-	if (MCHBAR32(0xf14) & (1 << 8)) /* HOT RESET */
-		sdram_initialize(BOOT_PATH_RESET, spd_addrmap);
-	else
-		sdram_initialize(BOOT_PATH_NORMAL, spd_addrmap);
+	sdram_initialize(boot_path, spd_addrmap);
 	printk(BIOS_DEBUG, "Memory initialized\n");
 
 	post_code(0x31);
-	ram_check(0x200000,0x300000);
+
+	quick_ram_check();
 
 	rcba_config();
 

-- 
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Gerrit-MessageType: merged
Gerrit-Change-Id: I5fb1bfe711549aabb6e597bda22848988a7e9cbe
Gerrit-PatchSet: 7
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Owner: Arthur Heymans <arthur at aheymans.xyz>
Gerrit-Reviewer: Arthur Heymans <arthur at aheymans.xyz>
Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki at gmail.com>
Gerrit-Reviewer: Martin Roth <martinroth at google.com>
Gerrit-Reviewer: Paul Menzel <paulepanter at users.sourceforge.net>
Gerrit-Reviewer: build bot (Jenkins)