[coreboot-gerrit] Change in coreboot[master]: soc/intel/skylake: Set xtal bypass

[Subrata Banik (Code Review)]

Subrata Banik has posted comments on this change. ( https://review.coreboot.org/19442 )

Change subject: soc/intel/skylake: Set xtal bypass
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Patch Set 2:

(4 comments)

https://review.coreboot.org/#/c/19442/2/src/soc/intel/skylake/finalize.c
File src/soc/intel/skylake/finalize.c:

PS2, Line 91: 	volatile void *pwr_base;
use pmcbase directly


PS2, Line 151: 	pwr_base = (volatile void *)pci_read_config32(PCH_DEV_PMC, 0x48);
>80?


PS2, Line 151: pwr_base
i guess u don't need pwr_base, pmcbase is there, use it


PS2, Line 152:  
one space extra


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Gerrit-MessageType: comment
Gerrit-Change-Id: Ide2d01536f652cd1b0ac32eede89ec410c5101cf
Gerrit-PatchSet: 2
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Owner: Naresh Solanki <naresh.solanki at intel.com>
Gerrit-Reviewer: Balaji Manigandan <balaji.manigandan at intel.com>
Gerrit-Reviewer: Furquan Shaikh <furquan at google.com>
Gerrit-Reviewer: Rajat Jain <rajatja at google.com>
Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi at intel.com>
Gerrit-Reviewer: Roy Park <roy.mingi.park at intel.corp-partner.google.com>
Gerrit-Reviewer: Subrata Banik <subrata.banik at intel.com>
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