[coreboot-gerrit] Change in coreboot[master]: soc/intel/common/block: Add Intel XDCI code support

Subrata Banik (Code Review) gerrit at coreboot.org
Mon Apr 24 08:29:07 CEST 2017


Subrata Banik has uploaded a new change for review. ( https://review.coreboot.org/19428 )

Change subject: soc/intel/common/block: Add Intel XDCI code support
......................................................................

soc/intel/common/block: Add Intel XDCI code support

XDCI MMIO offsets definitions are not alike between
various SoCs hence provided "soc_xdci_init" function
to implement SoC specific initialization.

Change-Id: I9cbc686a00c26b92be2847b6bd6c2e5aa5a690f7
Signed-off-by: Subrata Banik <subrata.banik at intel.com>
---
A src/soc/intel/common/block/include/intelblocks/xdci.h
A src/soc/intel/common/block/xdci/Kconfig
A src/soc/intel/common/block/xdci/Makefile.inc
A src/soc/intel/common/block/xdci/xdci.c
4 files changed, 70 insertions(+), 0 deletions(-)


  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/28/19428/1

diff --git a/src/soc/intel/common/block/include/intelblocks/xdci.h b/src/soc/intel/common/block/include/intelblocks/xdci.h
new file mode 100644
index 0000000..15de2ec
--- /dev/null
+++ b/src/soc/intel/common/block/include/intelblocks/xdci.h
@@ -0,0 +1,22 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2017 Intel Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef SOC_INTEL_COMMON_BLOCK_XDCI_H
+#define SOC_INTEL_COMMON_BLOCK_XDCI_H
+
+void soc_xdci_init(struct device *dev);
+
+#endif	/* SOC_INTEL_COMMON_BLOCK_XDCI_H */
+
diff --git a/src/soc/intel/common/block/xdci/Kconfig b/src/soc/intel/common/block/xdci/Kconfig
new file mode 100644
index 0000000..3918642
--- /dev/null
+++ b/src/soc/intel/common/block/xdci/Kconfig
@@ -0,0 +1,4 @@
+config SOC_INTEL_COMMON_BLOCK_XDCI
+	bool
+	help
+	  Intel Processor common XDCI support
diff --git a/src/soc/intel/common/block/xdci/Makefile.inc b/src/soc/intel/common/block/xdci/Makefile.inc
new file mode 100644
index 0000000..3326cde
--- /dev/null
+++ b/src/soc/intel/common/block/xdci/Makefile.inc
@@ -0,0 +1 @@
+ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_XDCI) += xdci.c
diff --git a/src/soc/intel/common/block/xdci/xdci.c b/src/soc/intel/common/block/xdci/xdci.c
new file mode 100644
index 0000000..2d30f3e
--- /dev/null
+++ b/src/soc/intel/common/block/xdci/xdci.c
@@ -0,0 +1,43 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2014 Google Inc.
+ * Copyright (C) 2015-2017 Intel Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <arch/io.h>
+#include <device/device.h>
+#include <device/pci.h>
+#include <device/pci_ids.h>
+#include <intelblocks/xdci.h>
+
+__attribute__((weak)) void soc_xdci_init(struct device *dev) { /* no-op */ }
+
+static struct device_operations usb_xdci_ops = {
+	.read_resources		= &pci_dev_read_resources,
+	.set_resources		= &pci_dev_set_resources,
+	.enable_resources	= &pci_dev_enable_resources,
+	.init			= soc_xdci_init,
+};
+
+static const unsigned short pci_device_ids[] = {
+	0x5aaa, /* ApolloLake */
+	0x31aa, /* GLK */
+	0x9d30, /* SunRisePoint LP */
+	0
+};
+
+static const struct pci_driver pch_usb_xdci __pci_driver = {
+	.ops	 = &usb_xdci_ops,
+	.vendor	 = PCI_VENDOR_ID_INTEL,
+	.devices	 = pci_device_ids,
+};

-- 
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Gerrit-MessageType: newchange
Gerrit-Change-Id: I9cbc686a00c26b92be2847b6bd6c2e5aa5a690f7
Gerrit-PatchSet: 1
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Owner: Subrata Banik <subrata.banik at intel.com>



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