[coreboot-gerrit] Change in coreboot[master]: mb/intel/d510mo: Hoop up ACPI_RESUME

[Arthur Heymans (Code Review)]

Arthur Heymans has uploaded a new change for review. ( https://review.coreboot.org/19416 )

Change subject: mb/intel/d510mo: Hoop up ACPI_RESUME
......................................................................

mb/intel/d510mo: Hoop up ACPI_RESUME

Raminit needs no modifications for resume from S3 to succeed.

Change-Id: I5fb1bfe711549aabb6e597bda22848988a7e9cbe
Signed-off-by: Arthur Heymans <arthur at aheymans.xyz>
---
M src/mainboard/intel/d510mo/Kconfig
M src/mainboard/intel/d510mo/romstage.c
2 files changed, 3 insertions(+), 0 deletions(-)


  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/16/19416/1

diff --git a/src/mainboard/intel/d510mo/Kconfig b/src/mainboard/intel/d510mo/Kconfig
index 757a24c..0f747cc 100644
--- a/src/mainboard/intel/d510mo/Kconfig
+++ b/src/mainboard/intel/d510mo/Kconfig
@@ -22,6 +22,7 @@
 	select SOUTHBRIDGE_INTEL_I82801GX
 	select SUPERIO_WINBOND_W83627THG
 	select HAVE_ACPI_TABLES
+	select HAVE_ACPI_RESUME
 	select BOARD_ROMSIZE_KB_1024
 	select MAINBOARD_HAS_NATIVE_VGA_INIT
 	select INTEL_INT15
diff --git a/src/mainboard/intel/d510mo/romstage.c b/src/mainboard/intel/d510mo/romstage.c
index f99e185..8b3ba16 100644
--- a/src/mainboard/intel/d510mo/romstage.c
+++ b/src/mainboard/intel/d510mo/romstage.c
@@ -124,6 +124,8 @@
 
 	post_code(0x30);
 
+	s3resume = southbridge_detect_s3_resume();
+
 	printk(BIOS_DEBUG, "Initializing memory\n");
 	if (MCHBAR32(0xf14) & (1 << 8)) /* HOT RESET */
 		sdram_initialize(BOOT_PATH_RESET, spd_addrmap);

-- 
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Gerrit-MessageType: newchange
Gerrit-Change-Id: I5fb1bfe711549aabb6e597bda22848988a7e9cbe
Gerrit-PatchSet: 1
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Owner: Arthur Heymans <arthur at aheymans.xyz>