[coreboot-gerrit] Change in coreboot[master]: amd/pi/hudson: Add TPM decode to SPI function

[Marc Jones (Code Review)]

Marc Jones has uploaded a new change for review. ( https://review.coreboot.org/19402 )

Change subject: amd/pi/hudson: Add TPM decode to SPI function
......................................................................

amd/pi/hudson: Add TPM decode to SPI function

Add a function to send the TPM decode to the SPI interface.
Enables use of SPI TPMs on Hudson mainboards.

Change-Id: I0e85ed92163e38eca6a55456708ab322d6a90d4c
Signed-off-by: Marc Jones <marcj303 at gmail.com>
---
M src/southbridge/amd/pi/hudson/early_setup.c
M src/southbridge/amd/pi/hudson/hudson.h
2 files changed, 11 insertions(+), 1 deletion(-)


  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/02/19402/1

diff --git a/src/southbridge/amd/pi/hudson/early_setup.c b/src/southbridge/amd/pi/hudson/early_setup.c
index b111e10..ed6fcb6 100644
--- a/src/southbridge/amd/pi/hudson/early_setup.c
+++ b/src/southbridge/amd/pi/hudson/early_setup.c
@@ -321,4 +321,13 @@
 					& ~SPI_READ_MODE_MASK) | mode);
 }
 
+void hudson_tpm_decode_spi(void)
+{
+	device_t dev = PCI_DEV(0, 0x14, 3);	/* LPC device */
+
+	u32 spibase = pci_read_config32(dev, SPIROM_BASE_ADDRESS_REGISTER);
+	pci_write_config32(dev, SPIROM_BASE_ADDRESS_REGISTER, spibase
+							| ROUTE_TPM_2_SPI);
+}
+
 #endif
diff --git a/src/southbridge/amd/pi/hudson/hudson.h b/src/southbridge/amd/pi/hudson/hudson.h
index d9e9129..25ddf47 100644
--- a/src/southbridge/amd/pi/hudson/hudson.h
+++ b/src/southbridge/amd/pi/hudson/hudson.h
@@ -66,6 +66,7 @@
 #define REV_HUDSON_A12			0x12
 
 #define SPIROM_BASE_ADDRESS_REGISTER	0xA0
+#define   ROUTE_TPM_2_SPI		BIT(3)
 #define   SPI_ROM_ENABLE		0x02
 #define   SPI_BASE_ADDRESS		0xFEC10000
 
@@ -185,7 +186,7 @@
 void hudson_set_readspeed(u16 norm, u16 fast);
 void lpc_wideio_512_window(uint16_t base);
 void lpc_wideio_16_window(uint16_t base);
-
+void hudson_tpm_decode_spi(void);
 int s3_save_nvram_early(u32 dword, int size, int  nvram_pos);
 int s3_load_nvram_early(int size, u32 *old_dword, int nvram_pos);
 void configure_hudson_uart(void);

-- 
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Gerrit-MessageType: newchange
Gerrit-Change-Id: I0e85ed92163e38eca6a55456708ab322d6a90d4c
Gerrit-PatchSet: 1
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Owner: Marc Jones <marc at marcjonesconsulting.com>