[coreboot-gerrit] Change in coreboot[master]: soc/intel: [WIP] Create Intel common smi code

[Subrata Banik (Code Review)]

Subrata Banik has posted comments on this change. ( https://review.coreboot.org/19381 )

Change subject: soc/intel: [WIP] Create Intel common smi code
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Patch Set 1:

(3 comments)

why do we have skylake and common code patch together ?

https://review.coreboot.org/#/c/19381/1/src/soc/intel/apollolake/include/soc/pm.h
File src/soc/intel/apollolake/include/soc/pm.h:

PS1, Line 85: #define   ENABLE_SMI_PARAMS	(APMC_EN | SLP_SMI_EN | BGL_SMI_EN | EOS | GPIO_EN)
>80


https://review.coreboot.org/#/c/19381/1/src/soc/intel/common/Makefile.inc
File src/soc/intel/common/Makefile.inc:

PS1, Line 37: CONFIG_SOC_INTEL_COMMON_SMI
COMMON_BLOCK_SMI?


https://review.coreboot.org/#/c/19381/1/src/soc/intel/skylake/include/soc/pm.h
File src/soc/intel/skylake/include/soc/pm.h:

PS1, Line 139: #define ENABLE_SMI_PARAMS	(APMC_EN | SLP_SMI_EN | GBL_SMI_EN | ESPI_SMI_EN | EOS)
>80


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Gerrit-MessageType: comment
Gerrit-Change-Id: Idb4335a05506e0d214b74d813bbeb2bf9b609f55
Gerrit-PatchSet: 1
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Owner: Brandon Breitenstein <brandon.breitenstein at intel.com>
Gerrit-Reviewer: Aaron Durbin <adurbin at chromium.org>
Gerrit-Reviewer: Hannah Williams <hannah.williams at intel.com>
Gerrit-Reviewer: Subrata Banik <subrata.banik at intel.com>
Gerrit-Reviewer: build bot (Jenkins)
Gerrit-HasComments: Yes