[coreboot-gerrit] Change in coreboot[master]: mb/asus/kgpe-d16: Enable TPM when selected in Kconfig

Timothy Pearson (Code Review) gerrit at coreboot.org
Wed Apr 19 23:34:09 CEST 2017


Timothy Pearson has submitted this change and it was merged. ( https://review.coreboot.org/19338 )

Change subject: mb/asus/kgpe-d16: Enable TPM when selected in Kconfig
......................................................................


mb/asus/kgpe-d16: Enable TPM when selected in Kconfig

Issue TPM startup on romstage completion via common LPC TPM
code if the TPM was enabled in Kconfig.

Change-Id: Id886d6aeefa045fb979f128b1cf4c10fff243b24
Signed-off-by: Timothy Pearson <tpearson at raptorengineering.com>
Reviewed-on: https://review.coreboot.org/19338
Tested-by: build bot (Jenkins)
Tested-by: Raptor Engineering Automated Test Stand <noreply at raptorengineeringinc.com>
Reviewed-by: Aaron Durbin <adurbin at chromium.org>
---
M src/mainboard/asus/kgpe-d16/romstage.c
1 file changed, 5 insertions(+), 1 deletion(-)

Approvals:
  Aaron Durbin: Looks good to me, approved
  Raptor Engineering Automated Test Stand: Verified
  build bot (Jenkins): Verified



diff --git a/src/mainboard/asus/kgpe-d16/romstage.c b/src/mainboard/asus/kgpe-d16/romstage.c
index 7e8fb97..9459d6c 100644
--- a/src/mainboard/asus/kgpe-d16/romstage.c
+++ b/src/mainboard/asus/kgpe-d16/romstage.c
@@ -1,7 +1,7 @@
 /*
  * This file is part of the coreboot project.
  *
- * Copyright (C) 2015 - 2016 Raptor Engineering, LLC
+ * Copyright (C) 2015 - 2017 Raptor Engineering, LLC
  *
  * Copyright (C) 2007 AMD
  * Written by Yinghai Lu <yinghailu at amd.com> for AMD.
@@ -45,6 +45,7 @@
 #include <cpu/amd/family_10h-family_15h/init_cpus.h>
 #include <arch/early_variables.h>
 #include <cbmem.h>
+#include <tpm.h>
 
 #include "resourcemap.c"
 #include "cpu/amd/quadcore/quadcore.c"
@@ -622,6 +623,9 @@
 	pci_write_config16(PCI_DEV(0, 0x14, 0), 0x56, 0x0bb0);
 	pci_write_config16(PCI_DEV(0, 0x14, 0), 0x5a, 0x0ff0);
 
+	if (IS_ENABLED(CONFIG_LPC_TPM))
+		init_tpm(s3resume);
+
 	post_cache_as_ram();	// BSP switch stack to ram, copy then execute LB.
 	post_code(0x43);	// Should never see this post code.
 }

-- 
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Gerrit-MessageType: merged
Gerrit-Change-Id: Id886d6aeefa045fb979f128b1cf4c10fff243b24
Gerrit-PatchSet: 3
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Owner: Timothy Pearson <tpearson at raptorengineering.com>
Gerrit-Reviewer: Aaron Durbin <adurbin at chromium.org>
Gerrit-Reviewer: Martin Roth <martinroth at google.com>
Gerrit-Reviewer: Patrick Georgi <pgeorgi at google.com>
Gerrit-Reviewer: Paul Menzel <paulepanter at users.sourceforge.net>
Gerrit-Reviewer: Raptor Engineering Automated Test Stand <noreply at raptorengineeringinc.com>
Gerrit-Reviewer: Stefan Reinauer <reinauer at chromium.org>
Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer at coreboot.org>
Gerrit-Reviewer: Timothy Pearson <tpearson at raptorengineering.com>
Gerrit-Reviewer: build bot (Jenkins)



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