[coreboot-gerrit] Change in coreboot[master]: soc/intel/skylake: use postcar stage for fsp 2.0
build bot (Jenkins) (Code Review)
gerrit at coreboot.org
Mon Apr 17 06:32:12 CEST 2017
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/19335 )
Change subject: soc/intel/skylake: use postcar stage for fsp 2.0
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Patch Set 1: Verified-1
Build Unstable
https://qa.coreboot.org/job/coreboot-gerrit/52134/ : UNSTABLE
https://qa.coreboot.org/job/coreboot-checkpatch/8033/ : SUCCESS
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Gerrit-MessageType: comment
Gerrit-Change-Id: I76de447710ae1d405886eb9420dc4064aa26eccc
Gerrit-PatchSet: 1
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Owner: Aaron Durbin <adurbin at chromium.org>
Gerrit-Reviewer: build bot (Jenkins)
Gerrit-HasComments: No
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