[coreboot-gerrit] Change in coreboot[master]: northbridge/haswell: clean up native graphics init code
Matt DeVillier (Code Review)
gerrit at coreboot.org
Sun Apr 16 08:52:51 CEST 2017
Matt DeVillier has uploaded a new change for review. ( https://review.coreboot.org/19327 )
Change subject: northbridge/haswell: clean up native graphics init code
......................................................................
northbridge/haswell: clean up native graphics init code
Clean up NGI code now that libgfxinit has replaced old C code:
- replace #if preprocessor guards with if (IS_ENABLED(...))
- don't guard variable declarations
- remove code that would only be executed for old NGI / isn't
used by libgfxinit
Test: boot google/wolf with VBIOS, NGI, and UEFI/GOP video init,
observe payload and pre-OS graphics display functional.
Change-Id: I96e74f49ea70e09cbac6f8af561de3e18fa7d260
Signed-off-by: Matt DeVillier <matt.devillier at gmail.com>
---
M src/northbridge/intel/haswell/gma.c
1 file changed, 22 insertions(+), 33 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/27/19327/1
diff --git a/src/northbridge/intel/haswell/gma.c b/src/northbridge/intel/haswell/gma.c
index 31e3cb6..f6fe5f7 100644
--- a/src/northbridge/intel/haswell/gma.c
+++ b/src/northbridge/intel/haswell/gma.c
@@ -216,13 +216,14 @@
{
gtt_write(HSW_PWR_WELL_CTL1, HSW_PWR_WELL_ENABLE);
gtt_poll(HSW_PWR_WELL_CTL1, HSW_PWR_WELL_STATE, HSW_PWR_WELL_STATE);
-#if CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT
+
/* In the native graphics case, we've got about 20 ms.
- * after we power up the the AUX channel until we can talk to it.
- * So get that going right now. We can't turn on the panel, yet, just VDD.
- */
- gtt_write(PCH_PP_CONTROL, PCH_PP_UNLOCK| EDP_FORCE_VDD | PANEL_POWER_RESET);
-#endif
+ * after we power up the the AUX channel until we can talk to it.
+ * So get that going right now. We can't turn on the panel, yet, just VDD.
+ */
+ if (IS_ENABLED (CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT)) {
+ gtt_write(PCH_PP_CONTROL, PCH_PP_UNLOCK| EDP_FORCE_VDD | PANEL_POWER_RESET);
+ }
}
static void gma_pm_init_pre_vbios(struct device *dev)
@@ -422,13 +423,11 @@
static void gma_func0_init(struct device *dev)
{
-#if CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT
struct northbridge_intel_haswell_config *conf = dev->chip_info;
struct intel_dp dp;
-#endif
-
int lightup_ok = 0;
u32 reg32;
+
/* IGD needs to be Bus Master */
reg32 = pci_read_config32(dev, PCI_COMMAND);
reg32 |= PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY | PCI_COMMAND_IO;
@@ -440,34 +439,24 @@
/* Post VBIOS init */
gma_setup_panel(dev);
-#if CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT
- printk(BIOS_SPEW, "NATIVE graphics, run native enable\n");
- /* Default set to 1 since it might be required for
- stuff like seabios */
- unsigned int init_fb = 1;
+ if (IS_ENABLED (CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT)) {
+ printk(BIOS_SPEW, "NATIVE graphics, run native enable\n");
- /* the BAR for graphics space is a well known number for
- * sandy and ivy. And the resource code renumbers it.
- * So it's almost like having two hardcodes.
- */
- dp.graphics = (void *)((uintptr_t)dev->resource_list[1].base);
- dp.physbase = pci_read_config32(dev, 0x5c) & ~0xf;
- dp.panel_power_down_delay = conf->gpu_panel_power_down_delay;
- dp.panel_power_up_delay = conf->gpu_panel_power_up_delay;
- dp.panel_power_cycle_delay = conf->gpu_panel_power_cycle_delay;
+ /* the BAR for graphics space is a well known number for
+ * sandy and ivy. And the resource code renumbers it.
+ * So it's almost like having two hardcodes.
+ */
+ dp.graphics = (void *)((uintptr_t)dev->resource_list[1].base);
+ dp.physbase = pci_read_config32(dev, 0x5c) & ~0xf;
+ dp.panel_power_down_delay = conf->gpu_panel_power_down_delay;
+ dp.panel_power_up_delay = conf->gpu_panel_power_up_delay;
+ dp.panel_power_cycle_delay = conf->gpu_panel_power_cycle_delay;
-#if IS_ENABLED(CONFIG_CHROMEOS)
- init_fb = display_init_required();
-#endif
- if (IS_ENABLED(CONFIG_MAINBOARD_USE_LIBGFXINIT)) {
- gma_gfxinit(gtt_res->base, (u32)dp.graphics,
- dp.physbase, &lightup_ok);
- } else {
- lightup_ok = panel_lightup(&dp, init_fb);
+ gma_gfxinit(gtt_res->base, (u32)dp.graphics, dp.physbase, &lightup_ok);
+
+ gfx_set_init_done(1);
}
- gfx_set_init_done(1);
-#endif
if (! lightup_ok) {
printk(BIOS_SPEW, "FUI did not run; using VBIOS\n");
mdelay(CONFIG_PRE_GRAPHICS_DELAY);
--
To view, visit https://review.coreboot.org/19327
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Gerrit-MessageType: newchange
Gerrit-Change-Id: I96e74f49ea70e09cbac6f8af561de3e18fa7d260
Gerrit-PatchSet: 1
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Owner: Matt DeVillier <matt.devillier at gmail.com>
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