[coreboot-gerrit] Change in coreboot[master]: nb/intel/fsp_sandybridge/gma: Setup OpRegion in nb code

Patrick Rudolph (Code Review) gerrit at coreboot.org
Sat Apr 15 11:18:16 CEST 2017


Patrick Rudolph has uploaded a new change for review. ( https://review.coreboot.org/19307 )

Change subject: nb/intel/fsp_sandybridge/gma: Setup OpRegion in nb code
......................................................................

nb/intel/fsp_sandybridge/gma: Setup OpRegion in nb code

Setup IGD OpRegion in northbridge and fill in GNVS' aslb.
At this point GNVS already hab been setup by SSDT injection.

Change-Id: Ie5d93117ee8bd8d15085aedbfa7358dfcf5f0045
Signed-off-by: Patrick Rudolph <siro at das-labor.org>
---
M src/northbridge/intel/fsp_sandybridge/gma.c
M src/southbridge/intel/fsp_bd82x6x/lpc.c
M src/southbridge/intel/fsp_i89xx/lpc.c
3 files changed, 28 insertions(+), 12 deletions(-)


  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/07/19307/1

diff --git a/src/northbridge/intel/fsp_sandybridge/gma.c b/src/northbridge/intel/fsp_sandybridge/gma.c
index affbbc6..85bbe35 100644
--- a/src/northbridge/intel/fsp_sandybridge/gma.c
+++ b/src/northbridge/intel/fsp_sandybridge/gma.c
@@ -80,6 +80,33 @@
 	drivers_intel_gma_displays_ssdt_generate(gfx);
 }
 
+static unsigned long
+gma_write_acpi_tables(struct device *const dev,
+					  unsigned long current,
+					  struct acpi_rsdp *const rsdp)
+{
+	igd_opregion_t *opregion;
+	global_nvs_t *gnvs;
+
+	opregion = igd_make_opregion();
+	if (opregion) {
+		/* GNVS has been already setup */
+		gnvs = cbmem_find(CBMEM_ID_ACPI_GNVS);
+		if (gnvs) {
+			/* IGD OpRegion Base Address */
+			gnvs->aslb = (u32)opregion;
+		} else {
+			printk(BIOS_ERR, "Error: GNVS table not found.\n");
+		}
+	}
+
+	current = acpi_align_current(current);
+
+	printk(BIOS_DEBUG, "current = %lx\n", current);
+
+	return current;
+}
+
 static struct pci_operations gma_pci_ops = {
 	.set_subsystem    = gma_set_subsystem,
 };
@@ -93,6 +120,7 @@
 	.scan_bus		= 0,
 	.enable			= 0,
 	.ops_pci		= &gma_pci_ops,
+	.write_acpi_tables	= gma_write_acpi_tables,
 };
 
 static const unsigned short gma_ids[] = {
diff --git a/src/southbridge/intel/fsp_bd82x6x/lpc.c b/src/southbridge/intel/fsp_bd82x6x/lpc.c
index c2dea6b..963359f 100644
--- a/src/southbridge/intel/fsp_bd82x6x/lpc.c
+++ b/src/southbridge/intel/fsp_bd82x6x/lpc.c
@@ -589,10 +589,6 @@
 static void southbridge_inject_dsdt(device_t dev)
 {
 	global_nvs_t *gnvs = cbmem_add (CBMEM_ID_ACPI_GNVS, sizeof(*gnvs));
-	void *opregion;
-
-	/* Calling northbridge code as gnvs contains opregion address.  */
-	opregion = igd_make_opregion();
 
 	if (gnvs) {
 		const struct i915_gpu_controller_info *gfx = intel_gma_get_controller_info();
@@ -600,8 +596,6 @@
 		memset(gnvs, 0, sizeof(*gnvs));
 
 		acpi_create_gnvs(gnvs);
-		/* IGD OpRegion Base Address */
-		gnvs->aslb = (u32)opregion;
 
 		gnvs->ndid = gfx->ndid;
 		memcpy(gnvs->did, gfx->did, sizeof(gnvs->did));
diff --git a/src/southbridge/intel/fsp_i89xx/lpc.c b/src/southbridge/intel/fsp_i89xx/lpc.c
index 7ebe6e4..5ba2969 100644
--- a/src/southbridge/intel/fsp_i89xx/lpc.c
+++ b/src/southbridge/intel/fsp_i89xx/lpc.c
@@ -501,10 +501,6 @@
 static void southbridge_inject_dsdt(device_t dev)
 {
 	global_nvs_t *gnvs = cbmem_add (CBMEM_ID_ACPI_GNVS, sizeof(*gnvs));
-	void *opregion;
-
-	/* Calling northbridge code as gnvs contains opregion address.  */
-	opregion = igd_make_opregion();
 
 	if (gnvs) {
 		const struct i915_gpu_controller_info *gfx = intel_gma_get_controller_info();
@@ -512,8 +508,6 @@
 		memset(gnvs, 0, sizeof(*gnvs));
 
 		acpi_create_gnvs(gnvs);
-		/* IGD OpRegion Base Address */
-		gnvs->aslb = (u32)opregion;
 
 		gnvs->ndid = gfx->ndid;
 		memcpy(gnvs->did, gfx->did, sizeof(gnvs->did));

-- 
To view, visit https://review.coreboot.org/19307
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Gerrit-MessageType: newchange
Gerrit-Change-Id: Ie5d93117ee8bd8d15085aedbfa7358dfcf5f0045
Gerrit-PatchSet: 1
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Owner: Patrick Rudolph <siro at das-labor.org>



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