[coreboot-gerrit] Change in coreboot[master]: driver/intel/mipi_camera: Add MIPI CSI camera SSDT generator
V Sowmya (Code Review)
gerrit at coreboot.org
Thu Apr 13 11:14:37 CEST 2017
V Sowmya has posted comments on this change. ( https://review.coreboot.org/18967 )
Change subject: driver/intel/mipi_camera: Add MIPI CSI camera SSDT generator
......................................................................
Patch Set 3:
(9 comments)
> (9 comments)
https://review.coreboot.org/#/c/18967/3//COMMIT_MSG
Commit Message:
PS3, Line 7: driver
> nit: drivers
Done
https://review.coreboot.org/#/c/18967/3/src/drivers/intel/mipi_camera/Kconfig
File src/drivers/intel/mipi_camera/Kconfig:
PS3, Line 1: DRIVERS_INTEL_MIPI_CAMERA
> You can add a "depends on HAVE_ACPI_TABLES" here and get rid of the #ifs in
Done
https://review.coreboot.org/#/c/18967/3/src/drivers/intel/mipi_camera/camera.c
File src/drivers/intel/mipi_camera/camera.c:
Line 65: }
> Is the CLDB not required anymore?
yes, CLDB buffer will not be used anymore.
https://review.coreboot.org/#/c/18967/3/src/drivers/intel/mipi_camera/chip.h
File src/drivers/intel/mipi_camera/chip.h:
PS3, Line 24: =
> space around =
Done
PS3, Line 28: =
> space around =
Done
PS3, Line 32: =
> space around =
Done
PS3, Line 38: uint8_t version;
: uint8_t sensor_card_sku;
: uint8_t csi2_data_stream_interface[16];
: uint16_t bdf_value;
: uint32_t dphy_link_en_fuses;
: uint32_t lanes_clock_division;
: uint8_t link_used;
: uint8_t lanes_used;
: uint32_t csi_rx_dly_cnt_termen_clane;
: uint32_t csi_rx_dly_cnt_settle_clane;
: uint32_t csi_rx_dly_cnt_termen_dlane0;
: uint32_t csi_rx_dly_cnt_settle_dlane0;
: uint32_t csi_rx_dly_cnt_termen_dlane1;
: uint32_t csi_rx_dly_cnt_settle_dlane1;
: uint32_t csi_rx_dly_cnt_termen_dlane2;
: uint32_t csi_rx_dly_cnt_settle_dlane2;
: uint32_t csi_rx_dly_cnt_termen_dlane3;
: uint32_t csi_rx_dly_cnt_settle_dlane3;
: uint32_t max_lane_speed;
: uint8_t sensor_calibration_file_index;
: uint8_t sensor_calibration_file_index_mbz[3];
: uint8_t rom_type;
: uint8_t vcm_type;
: uint8_t platform;
: uint8_t platform_sub;
: uint8_t flash_support;
: uint8_t privacy_led;
: uint8_t degree;
: uint8_t mipi_define;
: uint32_t mclk;
: uint8_t control_logic_id;
: uint8_t mipi_data_format;
: uint8_t silicon_version;
: uint8_t customer_id;
> Can you please add comments describing what each field does?
Done
PS3, Line 77: enum intel_power_action_type entry_type;
> If you are concerned about compatibility with the structure size used in ke
Done
PS3, Line 75: char name[32];
: uint32_t value;
: enum intel_power_action_type entry_type;
: uint32_t delay;
> Same as above. Please add comments.
Done
--
To view, visit https://review.coreboot.org/18967
To unsubscribe, visit https://review.coreboot.org/settings
Gerrit-MessageType: comment
Gerrit-Change-Id: Ief9e56d12b64081897613bf1c7abcdf915470b99
Gerrit-PatchSet: 3
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Owner: V Sowmya <v.sowmya at intel.com>
Gerrit-Reviewer: Aamir Bohra <aamir.bohra at intel.com>
Gerrit-Reviewer: Aaron Durbin <adurbin at chromium.org>
Gerrit-Reviewer: Balaji Manigandan <balaji.manigandan at intel.com>
Gerrit-Reviewer: Barnali Sarkar <barnali.sarkar at intel.com>
Gerrit-Reviewer: Duncan Laurie <dlaurie at chromium.org>
Gerrit-Reviewer: Furquan Shaikh <furquan at google.com>
Gerrit-Reviewer: Naresh Solanki <naresh.solanki at intel.com>
Gerrit-Reviewer: Paul Menzel <paulepanter at users.sourceforge.net>
Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi at intel.com>
Gerrit-Reviewer: Subrata Banik <subrata.banik at intel.com>
Gerrit-Reviewer: V Sowmya <v.sowmya at intel.com>
Gerrit-Reviewer: build bot (Jenkins)
Gerrit-HasComments: Yes
More information about the coreboot-gerrit
mailing list