[coreboot-gerrit] Change in coreboot[master]: amd/pi/00670F00: Change to early cbmem init

[Marshall Dawson (Code Review)]

Marshall Dawson has posted comments on this change. ( https://review.coreboot.org/18433 )

Change subject: amd/pi/00670F00: Change to early cbmem init
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Patch Set 8:

(6 comments)

https://review.coreboot.org/#/c/18433/8/src/cpu/amd/pi/00670F00/romstage.c
File src/cpu/amd/pi/00670F00/romstage.c:

Line 56: 	cbmem_initialize_empty();
> Once CBMEM has been initialized, you already have the possibility of moving
Done


https://review.coreboot.org/#/c/18433/8/src/northbridge/amd/pi/00670F00/memmap.c
File src/northbridge/amd/pi/00670F00/memmap.c:

Line 79: 		return (void *)(uintptr_t)uma_base_auto();
> You are only allowed to call uma_base_auto() when UMA_AUTO has been selecte
PI systems have less flexibility.  Will add comment to clarify.


PS8, Line 83: LibAmdMsrRead
> why can't native msr reads be used? Let alone this beyond bizarre StdHeader
Done


PS8, Line 83: LibAmdMsrRead
> I still recommend accounting 8 MiB for the SMM region here from day one, if
Done - placed a Kconfig patch ahead of this so I can pick up the CONFIG option.


https://review.coreboot.org/#/c/18433/8/src/northbridge/amd/pi/00670F00/northbridge.c
File src/northbridge/amd/pi/00670F00/northbridge.c:

Line 806: 			ramtop = limitk * 1024;
> Effectively ramtop is lvalue only and can be removed now.
Done.  Thanks.  Seems like the compiler should have complained.


PS8, Line 810: >> 10
> / KiB
Done.  AMD stuff is still full of these.  Would prefer to shorten the stack of patches before addressing them though.


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Gerrit-MessageType: comment
Gerrit-Change-Id: Id1c22a15752a07eebf39530ba8549ef1f74265ec
Gerrit-PatchSet: 8
Gerrit-Project: coreboot
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Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd at gmail.com>
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