[coreboot-gerrit] Change in coreboot[master]: amd/pi/00670F00: Reserve c0000-fffff

[Marshall Dawson (Code Review)]

Hello build bot (Jenkins),

I'd like you to reexamine a change.  Please visit

    https://review.coreboot.org/19156

to look at the new patch set (#3).

Change subject: amd/pi/00670F00: Reserve c0000-fffff
......................................................................

amd/pi/00670F00: Reserve c0000-fffff

Claim memory-mapped regions in the legacy area.

When the APU graphics is used, or if any add-in card is present and its
VBIOS initialized, claim all of 0xc0000-0xdffff.

If any BIOS tables are generated, claim all of 0xe0000-0xfffff.  This
specifically preserves the RSDP structure.

These changes allow code and information to be retained in the event
unused regions get wiped.

Original-Signed-off-by: Marshall Dawson <marshalldawson3rd at gmail.com>
Reviewed-by: Marc Jones <marcj303 at gmail.com>
(cherry picked from commit d612d4fe69881609d42053496409c452e1014947)

Change-Id: I9c47c919bbfd0edccf752e052f32d1e47c1a1324
Signed-off-by: Marc Jones <marcj303 at gmail.com>
---
M src/northbridge/amd/pi/00670F00/northbridge.c
1 file changed, 10 insertions(+), 0 deletions(-)


  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/56/19156/3
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Gerrit-MessageType: newpatchset
Gerrit-Change-Id: I9c47c919bbfd0edccf752e052f32d1e47c1a1324
Gerrit-PatchSet: 3
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Owner: Marc Jones <marc at marcjonesconsulting.com>
Gerrit-Reviewer: Aaron Durbin <adurbin at chromium.org>
Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd at gmail.com>
Gerrit-Reviewer: Martin Roth <martinroth at google.com>
Gerrit-Reviewer: Paul Menzel <paulepanter at users.sourceforge.net>
Gerrit-Reviewer: build bot (Jenkins)